HFCC-01 Low-Level Software (LLSW) Rel_6802_HFCC-01-RP-CSAR-CB
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mmapPwm.h
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1/*
2 * Copyright (c) 2025, TUSAS Malaysia
3 * All rights reserved.
4 * This file contains proprietary information. This
5 * file shall not be duplicated, used, modified,
6 * or disclosed in whole or in part without
7 * the express written consent of TUSAS.
8 */
9
16
17#ifndef INCLUDED_MMAP_PWM_H
18#define INCLUDED_MMAP_PWM_H
19
20#include "driverStatus.h"
21#include "commonDataTypes.h"
22
23// =========================================================================
24
25// mfb - memory map offset for PWM
26#define MMAP_PWM_MOD_OFFSET (0x1000U)
27
28// =========================================================================
29
30// device block memory offset
31#define MMAP_PWM_DEV_OFFSET (0x0100U)
32
33// =========================================================================
34
35// device block members memory offset
36#define MMAP_PWM_BANK_CFG_DEV (0x0000U)
37#define MMAP_PWM_BANK_TYPE_DEV (0x0004U)
38#define MMAP_PWM_PWM_PERIOD (0x0008U)
39#define MMAP_PWM_PWM_ON_TIME (0x000CU)
40#define MMAP_PWM_BANK_STATUS_FAULT (0x0050U)
41#define MMAP_PWM_BANK_STATUS_OUTPUT (0x0054U)
42#define MMAP_PWM_TEMP_RAW (0x0060U)
43#define MMAP_PWM_PBIT_STATUS (0x0068U)
44#define MMAP_PWM_CBIT_STATUS (0x006CU)
45#define MMAP_PWM_BANK_CH_STATE (0x0078U)
46
47// =========================================================================
48
49// Bit position bank status fault
50#define MMAP_PWM_POS_THERMAL_WARNING (0U)
51#define MMAP_PWM_POS_UNDER_LOAD (1U)
52#define MMAP_PWM_POS_POWER_SUPPLY_FAIL (2U)
53#define MMAP_PWM_POS_OVER_CURRENT_SHUTDOWN (3U)
54#define MMAP_PWM_POS_THERMAL_SHUTDOWN (4U)
55
56// LSB Bit position bank status output
57#define MMAP_PWM_POS_CH_STATUS (4U)
58#define MMAP_PWM_POS_SG_CLCH_STATUS (10U)
59
60// masking
61#define MMAP_PWM_MASK_CH_STATUS (0x30U)
62#define MMAP_PWM_MASK_SG_CLCH_STATUS (0xC00)
63
64// Bit position for PBIT
65#define MMAP_PWM_POS_PBIT_INCOMPLETED (0U)
66#define MMAP_PWM_POS_PBIT_F_5V5 (1U)
67#define MMAP_PWM_POS_PBIT_IC_COM_ERR (2U)
68
69// Bit position for CBIT
70#define MMAP_PWM_POS_CBIT_NOT_RUN (0U)
71#define MMAP_PWM_POS_CBIT_F_5V5 (1U)
72#define MMAP_PWM_POS_CBIT_IC_COM_ERR (2U)
73#define MMAP_PWM_POS_CBIT_F_IVDC (3U)
74
75#define MMAP_PWM_POS_DATA_SG_CLCH (5U)
76
77// =========================================================================
78
79// memory map constrains
80#define MMAP_PWM_PERIOD_LSB (50.0F)
81#define MMAP_PWM_TEMP_LSB (0.005F)
82
83// =========================================================================
84
85#endif // INCLUDED_MMAP_PWM_H