mmap_core_8h_source.html

/*

 * Copyright (c) 2025, TUSAS Malaysia

 * All rights reserved.

 * This file contains proprietary information. This

 * file shall not be duplicated, used, modified,

 * or disclosed in whole or in part without

 * the express written consent of TUSAS.

 */


#ifndef INCLUDED_MMAP_CORE_H

#define INCLUDED_MMAP_CORE_H


// =========================================================================


// memory status - mfb

#define MMAP_CORE_MFB1_MR_STATUS (0x0004U)

#define MMAP_CORE_MFB2_MR_STATUS (0x0008U)


// =========================================================================


// Board version information

#define MMAP_CORE_SERIAL_NUMBER  (0x0000U)

#define MMAP_CORE_PLATFORM       (0x0004U)

#define MMAP_CORE_MODEL          (0x0008U)

#define MMAP_CORE_GEN            (0x000CU)

#define MMAP_CORE_MAIN_REV       (0x0010U)

#define MMAP_CORE_FPGA_FIRM_VER  (0x0014U)

#define MMAP_CORE_CPLD_FIRM_VER  (0x0018U)

#define MMAP_CORE_MIO_SLOT_COUNT (0x001CU)


// Board status information

#define MMAP_CORE_FPGA_STATUS     (0x0020U)

#define MMAP_CORE_DRAM_TEMP       (0x0028U)

#define MMAP_CORE_FPGA_TEMP       (0x002CU)

#define MMAP_CORE_EFUSE_TEMP      (0x0030U)

#define MMAP_CORE_DC_DC_CONV_TEMP (0x0034U)


// Board MIO Based Address

#define MMAP_CORE_MIO_FUNC_1_START_ADDR (0x0100U)

#define MMAP_CORE_MIO_FUNC_2_START_ADDR (0x0104U)

#define MMAP_CORE_MIO_FUNC_3_START_ADDR (0x0108U)

#define MMAP_CORE_MIO_FUNC_4_START_ADDR (0x010CU)


// Board MIO Address Size

#define MMAP_CORE_MIO_FUNC_1_SIZE (0x0130U)

#define MMAP_CORE_MIO_FUNC_2_SIZE (0x0134U)

#define MMAP_CORE_MIO_FUNC_3_SIZE (0x0138U)

#define MMAP_CORE_MIO_FUNC_4_SIZE (0x013CU)


// Board MIO ID

#define MMAP_CORE_MIO_FUNC_1_ID (0x0160U)

#define MMAP_CORE_MIO_FUNC_2_ID (0x0164U)

#define MMAP_CORE_MIO_FUNC_3_ID (0x0168U)

#define MMAP_CORE_MIO_FUNC_4_ID (0x016CU)


#define MMAP_CORE_BRD_TEMP (0x0190U)


// Heartbeat Mechanism Based Address

#define MMAP_CORE_HBT_EN_DIS        (0x01B0U)

#define MMAP_CORE_HBT_RESOLUTION    (0x01B4U)

#define MMAP_CORE_HBT_TIMEOUT_COUNT (0x01B8U)

#define MMAP_CORE_HBT_ELAPSED_COUNT (0x01BCU)

#define MMAP_CORE_HBT_FEEDING       (0x01C0U)


// =========================================================================


// Bit position for PBIT and CBIT

#define MMAP_CORE_POS_PBIT_COMPLETE (2U)

#define MMAP_CORE_POS_CBIT_RUN      (3U)


// =========================================================================


// memory map constrains

#define MMAP_CORE_TEMP_LSB        (0.005F)

#define MMAP_CORE_BRD_TEMP_12_BIT (12U)

#define MMAP_CORE_HBT_ENABLE      (0xEEEEEEEEU)

#define MMAP_CORE_HBT_DISABLE     (0xDDDDDDDDU)

#define MMAP_CORE_HBT_FEED_A      (0xAAAAAAAAU)

#define MMAP_CORE_HBT_FEED_B      (0x55555555U)


// =========================================================================


#endif // INCLUDED_MMAP_CORE_H