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Macros
#define	MMAP_CORE_MFB1_MR_STATUS (0x0004U)
#define	MMAP_CORE_MFB2_MR_STATUS (0x0008U)
#define	MMAP_CORE_SERIAL_NUMBER (0x0000U)
#define	MMAP_CORE_PLATFORM (0x0004U)
#define	MMAP_CORE_MODEL (0x0008U)
#define	MMAP_CORE_GEN (0x000CU)
#define	MMAP_CORE_MAIN_REV (0x0010U)
#define	MMAP_CORE_FPGA_FIRM_VER (0x0014U)
#define	MMAP_CORE_CPLD_FIRM_VER (0x0018U)
#define	MMAP_CORE_MIO_SLOT_COUNT (0x001CU)
#define	MMAP_CORE_FPGA_STATUS (0x0020U)
#define	MMAP_CORE_DRAM_TEMP (0x0028U)
#define	MMAP_CORE_FPGA_TEMP (0x002CU)
#define	MMAP_CORE_EFUSE_TEMP (0x0030U)
#define	MMAP_CORE_DC_DC_CONV_TEMP (0x0034U)
#define	MMAP_CORE_MIO_FUNC_1_START_ADDR (0x0100U)
#define	MMAP_CORE_MIO_FUNC_2_START_ADDR (0x0104U)
#define	MMAP_CORE_MIO_FUNC_3_START_ADDR (0x0108U)
#define	MMAP_CORE_MIO_FUNC_4_START_ADDR (0x010CU)
#define	MMAP_CORE_MIO_FUNC_1_SIZE (0x0130U)
#define	MMAP_CORE_MIO_FUNC_2_SIZE (0x0134U)
#define	MMAP_CORE_MIO_FUNC_3_SIZE (0x0138U)
#define	MMAP_CORE_MIO_FUNC_4_SIZE (0x013CU)
#define	MMAP_CORE_MIO_FUNC_1_ID (0x0160U)
#define	MMAP_CORE_MIO_FUNC_2_ID (0x0164U)
#define	MMAP_CORE_MIO_FUNC_3_ID (0x0168U)
#define	MMAP_CORE_MIO_FUNC_4_ID (0x016CU)
#define	MMAP_CORE_BRD_TEMP (0x0190U)
#define	MMAP_CORE_HBT_EN_DIS (0x01B0U)
#define	MMAP_CORE_HBT_RESOLUTION (0x01B4U)
#define	MMAP_CORE_HBT_TIMEOUT_COUNT (0x01B8U)
#define	MMAP_CORE_HBT_ELAPSED_COUNT (0x01BCU)
#define	MMAP_CORE_HBT_FEEDING (0x01C0U)
#define	MMAP_CORE_POS_PBIT_COMPLETE (2U)
#define	MMAP_CORE_POS_CBIT_RUN (3U)
#define	MMAP_CORE_TEMP_LSB (0.005F)
#define	MMAP_CORE_BRD_TEMP_12_BIT (12U)
#define	MMAP_CORE_HBT_ENABLE (0xEEEEEEEEU)
#define	MMAP_CORE_HBT_DISABLE (0xDDDDDDDDU)
#define	MMAP_CORE_HBT_FEED_A (0xAAAAAAAAU)
#define	MMAP_CORE_HBT_FEED_B (0x55555555U)

Detailed Description

Author: Ramza Anuar ramza.nosp@m..anu.nosp@m.ar@tu.nosp@m.sas..nosp@m.my

Memory Map for Core

Macro Definition Documentation

◆ MMAP_CORE_BRD_TEMP

#define MMAP_CORE_BRD_TEMP (0x0190U)

◆ MMAP_CORE_BRD_TEMP_12_BIT

#define MMAP_CORE_BRD_TEMP_12_BIT (12U)

◆ MMAP_CORE_CPLD_FIRM_VER

#define MMAP_CORE_CPLD_FIRM_VER (0x0018U)

◆ MMAP_CORE_DC_DC_CONV_TEMP

#define MMAP_CORE_DC_DC_CONV_TEMP (0x0034U)

◆ MMAP_CORE_DRAM_TEMP

#define MMAP_CORE_DRAM_TEMP (0x0028U)

◆ MMAP_CORE_EFUSE_TEMP

#define MMAP_CORE_EFUSE_TEMP (0x0030U)

◆ MMAP_CORE_FPGA_FIRM_VER

#define MMAP_CORE_FPGA_FIRM_VER (0x0014U)

◆ MMAP_CORE_FPGA_STATUS

#define MMAP_CORE_FPGA_STATUS (0x0020U)

◆ MMAP_CORE_FPGA_TEMP

#define MMAP_CORE_FPGA_TEMP (0x002CU)

◆ MMAP_CORE_GEN

#define MMAP_CORE_GEN (0x000CU)

◆ MMAP_CORE_HBT_DISABLE

#define MMAP_CORE_HBT_DISABLE (0xDDDDDDDDU)

◆ MMAP_CORE_HBT_ELAPSED_COUNT

#define MMAP_CORE_HBT_ELAPSED_COUNT (0x01BCU)

◆ MMAP_CORE_HBT_EN_DIS

#define MMAP_CORE_HBT_EN_DIS (0x01B0U)

◆ MMAP_CORE_HBT_ENABLE

#define MMAP_CORE_HBT_ENABLE (0xEEEEEEEEU)

◆ MMAP_CORE_HBT_FEED_A

#define MMAP_CORE_HBT_FEED_A (0xAAAAAAAAU)

◆ MMAP_CORE_HBT_FEED_B

#define MMAP_CORE_HBT_FEED_B (0x55555555U)

◆ MMAP_CORE_HBT_FEEDING

#define MMAP_CORE_HBT_FEEDING (0x01C0U)

◆ MMAP_CORE_HBT_RESOLUTION

#define MMAP_CORE_HBT_RESOLUTION (0x01B4U)

◆ MMAP_CORE_HBT_TIMEOUT_COUNT

#define MMAP_CORE_HBT_TIMEOUT_COUNT (0x01B8U)

◆ MMAP_CORE_MAIN_REV

#define MMAP_CORE_MAIN_REV (0x0010U)

◆ MMAP_CORE_MFB1_MR_STATUS

#define MMAP_CORE_MFB1_MR_STATUS (0x0004U)

◆ MMAP_CORE_MFB2_MR_STATUS

#define MMAP_CORE_MFB2_MR_STATUS (0x0008U)

◆ MMAP_CORE_MIO_FUNC_1_ID

#define MMAP_CORE_MIO_FUNC_1_ID (0x0160U)

◆ MMAP_CORE_MIO_FUNC_1_SIZE

#define MMAP_CORE_MIO_FUNC_1_SIZE (0x0130U)

◆ MMAP_CORE_MIO_FUNC_1_START_ADDR

#define MMAP_CORE_MIO_FUNC_1_START_ADDR (0x0100U)

◆ MMAP_CORE_MIO_FUNC_2_ID

#define MMAP_CORE_MIO_FUNC_2_ID (0x0164U)

◆ MMAP_CORE_MIO_FUNC_2_SIZE

#define MMAP_CORE_MIO_FUNC_2_SIZE (0x0134U)

◆ MMAP_CORE_MIO_FUNC_2_START_ADDR

#define MMAP_CORE_MIO_FUNC_2_START_ADDR (0x0104U)

◆ MMAP_CORE_MIO_FUNC_3_ID

#define MMAP_CORE_MIO_FUNC_3_ID (0x0168U)

◆ MMAP_CORE_MIO_FUNC_3_SIZE

#define MMAP_CORE_MIO_FUNC_3_SIZE (0x0138U)

◆ MMAP_CORE_MIO_FUNC_3_START_ADDR

#define MMAP_CORE_MIO_FUNC_3_START_ADDR (0x0108U)

◆ MMAP_CORE_MIO_FUNC_4_ID

#define MMAP_CORE_MIO_FUNC_4_ID (0x016CU)

◆ MMAP_CORE_MIO_FUNC_4_SIZE

#define MMAP_CORE_MIO_FUNC_4_SIZE (0x013CU)

◆ MMAP_CORE_MIO_FUNC_4_START_ADDR

#define MMAP_CORE_MIO_FUNC_4_START_ADDR (0x010CU)

◆ MMAP_CORE_MIO_SLOT_COUNT

#define MMAP_CORE_MIO_SLOT_COUNT (0x001CU)

◆ MMAP_CORE_MODEL

#define MMAP_CORE_MODEL (0x0008U)

◆ MMAP_CORE_PLATFORM

#define MMAP_CORE_PLATFORM (0x0004U)

◆ MMAP_CORE_POS_CBIT_RUN

#define MMAP_CORE_POS_CBIT_RUN (3U)

◆ MMAP_CORE_POS_PBIT_COMPLETE

#define MMAP_CORE_POS_PBIT_COMPLETE (2U)

◆ MMAP_CORE_SERIAL_NUMBER

#define MMAP_CORE_SERIAL_NUMBER (0x0000U)

◆ MMAP_CORE_TEMP_LSB

#define MMAP_CORE_TEMP_LSB (0.005F)

Macros