- Generated by
1.18.0
|
HFCC-01 Low-Level Software (LLSW) Rel_6802_HFCC-01-RP-CSAR-CB
|
Go to the source code of this file.
Data Structures | |
| struct | A429PbitStatus |
| ARINC 429 Power-On Built-In Test (PBIT) Status Bitfield Structure. More... | |
| struct | A429CbitStatus |
| ARINC 429 Continuous Built-In Test (CBIT) Status Bitfield Structure. More... | |
| struct | A429DevHandler |
| ARINC 429 Controller Hardware Device Handler Structure. More... | |
Enumerations | |
| enum | A429BITState { A429_BIT_PASS = 0U , A429_BIT_FAIL = 1U } |
| ARINC 429 Built-In Test (BIT) Pass/Fail Evaluation State. More... | |
| enum | TxSpeedRate { TX_CH_SPEED_HIGH , TX_CH_SPEED_LOW } |
| ARINC 429 Transmitter Channel Transmission Speed Selection (High: 100 kbps, Low: 12.5 kbps). More... | |
| enum | RxSpeedRate { RX_CH_SPEED_HIGH , RX_CH_SPEED_LOW } |
| ARINC 429 Receiver Channel Transmission Speed Selection (High: 100 kbps, Low: 12.5 kbps). More... | |
| enum | MsgParityType { MSG_PARITY_ODD , MSG_PARITY_EVEN } |
| ARINC 429 Word Parity Encoding Type (Odd or Even). More... | |
| enum | TxChParityMode { TX_CH_PARITY_ODD , TX_CH_PARITY_EVEN , TX_CH_PARITY_DISABLE } |
| ARINC 429 Transmitter Channel Parity Mode Configuration (Odd, Even, or Disabled). More... | |
| enum | RxChParityMode { RX_CH_PARITY_ODD , RX_CH_PARITY_EVEN , RX_CH_PARITY_DISABLE } |
| ARINC 429 Receiver Channel Parity Mode Configuration (Odd, Even, or Disabled). More... | |
| enum | ChStatus { CH_ENABLE , CH_DISABLE } |
| ARINC 429 Channel Operational Enable/Disable Status. More... | |
Functions | |
| DriverStatus | a429_reset (const A429DevHandler a429DevHdl) |
| a429_reset. | |
| DriverStatus | a429_configMCR (const A429DevHandler a429DevHdl, const UInt32 mcrValue) |
| a429_configMCR. | |
| DriverStatus | a429_txEnableChannel (const A429DevHandler a429DevHdl, const UInt8 txChannelNum) |
| a429_txEnableChannel. | |
| DriverStatus | a429_txDisableChannel (const A429DevHandler a429DevHdl, const UInt8 txChannelNum) |
| a429_txDisableChannel. | |
| DriverStatus | a429_txGetState (const A429DevHandler a429DevHdl, const UInt8 txChannelNum, ChStatus *txStatusPtr) |
| a429_txGetState | |
| DriverStatus | a429_txEnableParity (const A429DevHandler a429DevHdl, const UInt8 txChannelNum, const TxChParityMode parityType) |
| a429_txEnableParity. | |
| DriverStatus | a429_txDisableParity (const A429DevHandler a429DevHdl, const UInt8 txChannelNum) |
| a429_txDisableParity. | |
| DriverStatus | a429_txSetSpeed (const A429DevHandler a429DevHdl, const UInt8 txChannelNum, const TxSpeedRate dataRate) |
| a429_txSetSpeed. | |
| DriverStatus | a429_txFIFOMsg (const A429DevHandler a429DevHdl, const UInt8 txChannelNum, const UInt32 *FIFOMsgPtr, const UInt32 msgCount) |
| a429_txFIFOMsg. | |
| DriverStatus | a429_rxEnableChannel (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum) |
| a429_rxEnableChannel. | |
| DriverStatus | a429_rxDisableChannel (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum) |
| a429_rxDisableChannel. | |
| DriverStatus | a429_rxGetState (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, ChStatus *rxStatusPtr) |
| a429_rxGetState. | |
| DriverStatus | a429_rxEnableParity (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, const RxChParityMode parityType) |
| a429_rxEnableParity. | |
| DriverStatus | a429_rxDisableParity (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum) |
| a429_rxDisableParity. | |
| DriverStatus | a429_rxSetSpeed (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, const RxSpeedRate dataRate) |
| a429_rxSetSpeed. | |
| DriverStatus | a429_rxSetLabelFilter (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, const UInt8 *filterLabelPtr, const UInt8 filterCount) |
| a429_rxSetLabelFilter. | |
| DriverStatus | a429_rxClearLabelFilter (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum) |
| a429_rxClearLabelFilter. | |
| DriverStatus | a429_rxSetSDIFilter (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, const UInt8 sdiValue) |
| a429_rxSetSDIFilter. | |
| DriverStatus | a429_rxDisableSDIFilter (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum) |
| a429_rxDisableSDIFilter. | |
| DriverStatus | a429_rxGetFIFOMsgs (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, UInt32 *recvMsgsPtr, UInt32 *recvMsgCountPtr) |
| a429_rxGetFIFOMsgs. | |
| DriverStatus | a429_getPbit (const A429DevHandler a429DevHdl, A429PbitStatus *a429PbitPtr) |
| a429_getA429Pbit. | |
| DriverStatus | a429_getCbit (const A429DevHandler a429DevHdl, A429CbitStatus *a429CbitPtr) |
| a429_getCbit. | |
| DriverStatus | a429_getTemp (const A429DevHandler a429DevHdl, Float32 *temp) |
| a429_getTemp. | |
ARINC429 device driver header file
| enum A429BITState |
| enum ChStatus |
| enum MsgParityType |
| enum RxChParityMode |
| enum RxSpeedRate |
| enum TxChParityMode |
| enum TxSpeedRate |
| DriverStatus a429_configMCR | ( | const A429DevHandler | a429DevHdl, |
| const UInt32 | mcrValue ) |
a429_configMCR.
Write the caller-supplied MCR configuration value to the ARINC429 Master Control Register. The caller selects the configuration value; this function does not add a delay after the write.
| [in] | a429DevHdl | Populated ARINC429 device handler containing the target device base address. |
| [in] | mcrValue | 32-bit Master Control Register value to write. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_CONFIGMCR_01 | HLR_A429_287 | WHEN MCR configuration is requested, the a429_configMCR() function SHALL write the input @p mcrValue to the A429 Master Control Register identified by MMAP_A429_MCR. | a429.c:a429_configMCR() | Test | Closed — Recovered |
| LLR_A429_A429_CONFIGMCR_02 | HLR_A429_287 | WHEN the MCR write reports a driver failure status other than DRV_SUCCESS, the a429_configMCR() function SHALL return that driver failure status. | a429.c:a429_configMCR() | Test | Closed — Recovered |
| LLR_A429_A429_CONFIGMCR_03 | HLR_A429_287 | WHEN the MCR write completes successfully, the a429_configMCR() function SHALL return DRV_SUCCESS without adding a delay in this function. | a429.c:a429_configMCR() | Test | Closed — Recovered |
| DriverStatus a429_getCbit | ( | const A429DevHandler | a429DevHdl, |
| A429CbitStatus * | a429CbitPtr ) |
a429_getCbit.
Get CBIT status for ARINC429.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [out] | a429CbitPtr | Pointer for ARINC429 CBIT Status. |
| DRV_SUCCESS | : Success. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_GETCBIT_01 | HLR_A429_23606 | WHEN a429CbitPtr is NULL, the a429_getCbit() function SHALL abort processing and return DRV_INVALID_PARAM. | a429.c:a429_getCbit() | Test | Closed |
| LLR_A429_A429_GETCBIT_02 | HLR_A429_23606 | WHEN the destination pointer is valid, the a429_getCbit() function SHALL read the 32-bit CBIT Status Register at physical offset 0x01F0 (MMAP_A429_CBIT_STAT) using readA429Reg() and decode power fault, undertemperature (bit 5), and overtemperature (bit 6). | a429.c:a429_getCbit() | Test | Closed |
| LLR_A429_A429_GETCBIT_03 | HLR_A429_23606 | WHEN the CBIT status register is read successfully, the a429_getCbit() function SHALL read the 32-bit CBIT Data Register at physical offset 0x01F4 (MMAP_A429_CBIT_DATA) using readA429Reg() and decode TX/RX channel loopback mismatches (bits 0-10) into a429CbitPtr. | a429.c:a429_getCbit() | Test | Closed |
| LLR_A429_A429_GETCBIT_04 | HLR_A429_23606 | WHEN all CBIT decoding completes successfully, the a429_getCbit() function SHALL return DRV_SUCCESS. | a429.c:a429_getCbit() | Test | Closed |
| DriverStatus a429_getPbit | ( | const A429DevHandler | a429DevHdl, |
| A429PbitStatus * | a429PbitPtr ) |
a429_getA429Pbit.
Get PBIT status for ARINC429.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [out] | a429PbitPtr | Pointer for ARINC429 PBIT Status. |
| DRV_SUCCESS | : Success. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_GETPBIT_01 | HLR_A429_405 | WHEN a429PbitPtr is NULL, the a429_getPbit() function SHALL abort processing and return DRV_INVALID_PARAM. | a429.c:a429_getPbit() | Test | Closed |
| LLR_A429_A429_GETPBIT_02 | HLR_A429_405 | WHEN the destination pointer a429PbitPtr is valid, the a429_getPbit() function SHALL read the 32-bit PBIT Status Register at physical offset 0x01EC (MMAP_A429_PBIT_STAT) from the ARINC 429 device base memory address. | a429.c:a429_getPbit() | Test | Closed |
| LLR_A429_A429_GETPBIT_03 | HLR_A429_405 | WHEN reading the PBIT Status Register fails (reporting a driver status other than DRV_SUCCESS), the a429_getPbit() function SHALL abort processing and return the reported driver status. | a429.c:a429_getPbit() | Test | Closed |
| LLR_A429_A429_GETPBIT_04 | HLR_A429_405 | WHEN the PBIT Status Register is read successfully, the a429_getPbit() function SHALL decode power fault (bit 0), IC ready (bit 1), communication error (bit 2), BIST error (bit 3), TX loopback channels 1-4 (bits 4-7), and RX loopback channels 1-7 (bits 8-14) into a429PbitPtr. | a429.c:a429_getPbit() | Test | Closed |
| LLR_A429_A429_GETPBIT_05 | HLR_A429_405 | WHEN all PBIT status decoding completes successfully, the a429_getPbit() function SHALL return DRV_SUCCESS. | a429.c:a429_getPbit() | Test | Closed |
| DriverStatus a429_getTemp | ( | const A429DevHandler | a429DevHdl, |
| Float32 * | temp ) |
a429_getTemp.
Get ARINC429 temperature value in degree Celsius (C).
| [in] | a429DevHdl | The ARINC429 device handler. |
| [out] | temp | The pointer of temperature value in degree Celsius (C). |
| DRV_SUCCESS | : Success. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_GETTEMP_01 | HLR_A429_26486 | WHEN temp pointer is NULL, the a429_getTemp() function SHALL abort processing and return DRV_INVALID_PARAM. | a429.c:a429_getTemp() | Test | Closed |
| LLR_A429_A429_GETTEMP_02 | HLR_A429_26486 | WHEN the destination pointer is valid, the a429_getTemp() function SHALL read the 32-bit Temperature Sensor Register at physical offset 0x01F8 from a429DevHdl.baseAddress using readA429Reg(). | a429.c:a429_getTemp() | Test | Closed |
| LLR_A429_A429_GETTEMP_03 | HLR_A429_26486 | WHEN the temperature register is read successfully, the a429_getTemp() function SHALL scale the raw 32-bit integer reading by 0.005 °C/LSB to calculate engineering temperature in Celsius and assign to *temp. | a429.c:a429_getTemp() | Test | Closed |
| LLR_A429_A429_GETTEMP_04 | HLR_A429_26486 | WHEN temperature acquisition and scaling complete successfully, the a429_getTemp() function SHALL return DRV_SUCCESS. | a429.c:a429_getTemp() | Test | Closed |
| DriverStatus a429_reset | ( | const A429DevHandler | a429DevHdl | ) |
a429_reset.
Reset the ARINC429 module by asserting the module reset control, maintaining the reset assertion for 100 microseconds, deasserting the reset control, waiting 100 microseconds for stabilization, and clearing the receive-channel parity state.
| [in] | a429DevHdl | Populated ARINC429 device handler containing the target device base address. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_RESET_01 | HLR_A429_30858 | WHEN the A429 device handler identifies the target device, the a429_reset() function SHALL assert the A429 module reset control by writing 0x00000001 to the register identified by MMAP_A429_RESET_MODULE. | a429.c:a429_reset() | Test | Closed — Recovered |
| LLR_A429_A429_RESET_02 | HLR_A429_30858 | WHEN the reset assertion write completes successfully, the a429_reset() function SHALL maintain the hardware reset assertion for 100 microseconds before deasserting it. | a429.c:a429_reset() | Test | Pending Engineering Review |
| LLR_A429_A429_RESET_03 | HLR_A429_30858 | WHEN the reset assertion interval completes, the a429_reset() function SHALL deassert the A429 module reset control by writing 0x00000000 to the register identified by MMAP_A429_RESET_MODULE. | a429.c:a429_reset() | Test | Closed — Recovered |
| LLR_A429_A429_RESET_04 | HLR_A429_30858 | WHEN the reset deassertion write completes successfully, the a429_reset() function SHALL wait for 100 microseconds before completing reset processing. | a429.c:a429_reset() | Test | Pending Engineering Review |
| LLR_A429_A429_RESET_05 | HLR_A429_30858 | WHEN either reset-register write reports a driver failure, the a429_reset() function SHALL return the reported driver failure status and SHALL NOT report successful reset completion. | a429.c:a429_reset() | Test | Closed — Recovered |
| LLR_A429_A429_RESET_06 | HLR_A429_30858 | WHEN reset processing completes successfully, the a429_reset() function SHALL set the receive-channel parity state for each configured receive channel to RX_CH_PARITY_DISABLE. | a429.c:a429_reset() | Test | Pending Derived Approval |
| LLR_A429_A429_RESET_07 | HLR_A429_30858 | WHEN all reset operations and receive-channel parity-state initialization complete successfully, the a429_reset() function SHALL return DRV_SUCCESS. | a429.c:a429_reset() | Test | Closed — Recovered |
| DriverStatus a429_rxClearLabelFilter | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | rxChannelNum ) |
a429_rxClearLabelFilter.
Clear the filter label at the specified receiver channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | rxChannelNum | Receive channel number to access. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_RXCLEARLABELFILTER_01 | HLR_A429_300 | WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxClearLabelFilter() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_rxClearLabelFilter() | Test | Closed |
| LLR_A429_A429_RXCLEARLABELFILTER_02 | HLR_A429_300 | WHEN channel validation passes, the a429_rxClearLabelFilter() function SHALL clear all 8 bitmask segments to 0x00000000 and invoke configLabelFilter() to reset the Label Filter Table at offset 0x00C4 + (rxChannelNum * 0x20). | a429.c:a429_rxClearLabelFilter() | Test | Closed |
| LLR_A429_A429_RXCLEARLABELFILTER_03 | HLR_A429_300 | WHEN all operational filter clearing completes successfully, the a429_rxClearLabelFilter() function SHALL return DRV_SUCCESS. | a429.c:a429_rxClearLabelFilter() | Test | Closed |
| DriverStatus a429_rxDisableChannel | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | rxChannelNum ) |
a429_rxDisableChannel.
Disable the specified receiver channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | rxChannelNum | Receive channel number to access. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_RXDISABLECHANNEL_01 | HLR_A429_289 | WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxDisableChannel() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_rxDisableChannel() | Test | Closed |
| LLR_A429_A429_RXDISABLECHANNEL_02 | HLR_A429_289 | WHEN channel validation passes, the a429_rxDisableChannel() function SHALL read the Receiver Control Register (RX_CR) at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) from a429DevHdl.baseAddress using readA429Reg(). | a429.c:a429_rxDisableChannel() | Test | Closed |
| LLR_A429_A429_RXDISABLECHANNEL_03 | HLR_A429_289 | WHEN the register is read successfully, the a429_rxDisableChannel() function SHALL clear bit 7 (Receiver Channel Enable, MMAP_A429_RX_CR_POS_ENABLE) and write the updated control word to the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). | a429.c:a429_rxDisableChannel() | Test | Closed |
| LLR_A429_A429_RXDISABLECHANNEL_04 | HLR_A429_289 | WHEN the register write completes successfully, the a429_rxDisableChannel() function SHALL wait for a minimum hardware receiver deactivation settling delay of 1 millisecond before proceeding. | a429.c:a429_rxDisableChannel() | Test | Closed |
| LLR_A429_A429_RXDISABLECHANNEL_05 | HLR_A429_289 | WHEN all operational receiver disablement completes successfully, the a429_rxDisableChannel() function SHALL return DRV_SUCCESS. | a429.c:a429_rxDisableChannel() | Test | Closed |
| DriverStatus a429_rxDisableParity | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | rxChannelNum ) |
a429_rxDisableParity.
Disable parity at the specified receiver channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | rxChannelNum | Receive channel number to access. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_RXDISABLEPARITY_01 | HLR_A429_20528 | WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxDisableParity() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_rxDisableParity() | Test | Closed |
| LLR_A429_A429_RXDISABLEPARITY_02 | HLR_A429_20528 | WHEN channel validation passes, the a429_rxDisableParity() function SHALL read the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using readA429Reg(). | a429.c:a429_rxDisableParity() | Test | Closed |
| LLR_A429_A429_RXDISABLEPARITY_03 | HLR_A429_20528 | WHEN the register is read successfully, the a429_rxDisableParity() function SHALL clear bit 5 (Parity Checking Enable) and write the updated 32-bit value to physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). | a429.c:a429_rxDisableParity() | Test | Closed |
| LLR_A429_A429_RXDISABLEPARITY_04 | HLR_A429_20528 | WHEN the register write completes successfully, the a429_rxDisableParity() function SHALL wait for a minimum hardware parity bypass settling delay of 1 millisecond before proceeding. | a429.c:a429_rxDisableParity() | Test | Closed |
| LLR_A429_A429_RXDISABLEPARITY_05 | HLR_A429_20528 | WHEN all operational parity disablement completes successfully, the a429_rxDisableParity() function SHALL return DRV_SUCCESS. | a429.c:a429_rxDisableParity() | Test | Closed |
| DriverStatus a429_rxDisableSDIFilter | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | rxChannelNum ) |
a429_rxDisableSDIFilter.
Disable filtering the message with specified SDI bit at the specified receiver channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | rxChannelNum | Receive channel number to access. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_RXDISABLESDIFILTER_01 | HLR_A429_21622 | WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxDisableSDIFilter() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_rxDisableSDIFilter() | Test | Closed |
| LLR_A429_A429_RXDISABLESDIFILTER_02 | HLR_A429_21622 | WHEN channel validation passes, the a429_rxDisableSDIFilter() function SHALL read the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using readA429Reg(). | a429.c:a429_rxDisableSDIFilter() | Test | Closed |
| LLR_A429_A429_RXDISABLESDIFILTER_03 | HLR_A429_21622 | WHEN the register is read successfully, the a429_rxDisableSDIFilter() function SHALL clear bit 4 (SDI Enable), bit 2 (SD9), and bit 3 (SD10), then write to physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). | a429.c:a429_rxDisableSDIFilter() | Test | Closed |
| LLR_A429_A429_RXDISABLESDIFILTER_04 | HLR_A429_21622 | WHEN the register write completes successfully, the a429_rxDisableSDIFilter() function SHALL wait for a minimum hardware SDI bypass settling delay of 1 millisecond before proceeding. | a429.c:a429_rxDisableSDIFilter() | Test | Closed |
| LLR_A429_A429_RXDISABLESDIFILTER_05 | HLR_A429_21622 | WHEN all operational SDI disablement completes successfully, the a429_rxDisableSDIFilter() function SHALL return DRV_SUCCESS. | a429.c:a429_rxDisableSDIFilter() | Test | Closed |
| DriverStatus a429_rxEnableChannel | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | rxChannelNum ) |
a429_rxEnableChannel.
Enable the specified receiver channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | rxChannelNum | Receive channel number to access. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_RXENABLECHANNEL_01 | HLR_A429_289 | WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxEnableChannel() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_rxEnableChannel() | Test | Closed |
| LLR_A429_A429_RXENABLECHANNEL_02 | HLR_A429_289 | WHEN channel validation passes, the a429_rxEnableChannel() function SHALL read the Receiver Control Register (RX_CR) at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) from a429DevHdl.baseAddress using readA429Reg(). | a429.c:a429_rxEnableChannel() | Test | Closed |
| LLR_A429_A429_RXENABLECHANNEL_03 | HLR_A429_289 | WHEN the register is read successfully, the a429_rxEnableChannel() function SHALL set bit 7 (Receiver Channel Enable, MMAP_A429_RX_CR_POS_ENABLE) and write the updated control word to the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). | a429.c:a429_rxEnableChannel() | Test | Closed |
| LLR_A429_A429_RXENABLECHANNEL_04 | HLR_A429_289 | WHEN the register write completes successfully, the a429_rxEnableChannel() function SHALL wait for a minimum hardware receiver input amplifier settling delay of 1 millisecond before proceeding. | a429.c:a429_rxEnableChannel() | Test | Closed |
| LLR_A429_A429_RXENABLECHANNEL_05 | HLR_A429_289 | WHEN all operational receiver enablement completes successfully, the a429_rxEnableChannel() function SHALL return DRV_SUCCESS. | a429.c:a429_rxEnableChannel() | Test | Closed |
| DriverStatus a429_rxEnableParity | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | rxChannelNum, | ||
| const RxChParityMode | parityType ) |
a429_rxEnableParity.
Enable parity at the specified receiver channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | rxChannelNum | Receive channel number to access. |
| [in] | parityType | Set (1) for even parity and set (0) for odd parity bit. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CONFIG | : The configuration parameter is invalid. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_RXENABLEPARITY_01 | HLR_A429_20528 | WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxEnableParity() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_rxEnableParity() | Test | Closed |
| LLR_A429_A429_RXENABLEPARITY_02 | HLR_A429_20528 | WHEN rxParityMode is not one of RX_CH_PARITY_ODD (0U) or RX_CH_PARITY_EVEN (1U), the a429_rxEnableParity() function SHALL abort processing and return DRV_INVALID_PARAM. | a429.c:a429_rxEnableParity() | Test | Closed |
| LLR_A429_A429_RXENABLEPARITY_03 | HLR_A429_20528 | WHEN parameters are validated, the a429_rxEnableParity() function SHALL read the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using readA429Reg(). | a429.c:a429_rxEnableParity() | Test | Closed |
| LLR_A429_A429_RXENABLEPARITY_04 | HLR_A429_20528 | WHEN the register is read successfully, the a429_rxEnableParity() function SHALL set bit 5 (Parity Checking Enable) and write the updated value to physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). | a429.c:a429_rxEnableParity() | Test | Closed |
| LLR_A429_A429_RXENABLEPARITY_05 | HLR_A429_20528 | WHEN the register write completes successfully, the a429_rxEnableParity() function SHALL wait for a minimum hardware parity verification settling delay of 1 millisecond before proceeding. | a429.c:a429_rxEnableParity() | Test | Closed |
| LLR_A429_A429_RXENABLEPARITY_06 | HLR_A429_20528 | WHEN all operational parity enablement completes successfully, the a429_rxEnableParity() function SHALL return DRV_SUCCESS. | a429.c:a429_rxEnableParity() | Test | Closed |
| DriverStatus a429_rxGetFIFOMsgs | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | rxChannelNum, | ||
| UInt32 * | recvMsgsPtr, | ||
| UInt32 * | recvMsgCountPtr ) |
a429_rxGetFIFOMsgs.
Retrieve the messages in receive FIFO and FIFO count at the specified receiver channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | rxChannelNum | Receive channel number to access. |
| [out] | recvMsgsPtr | An array of unread 32-bit Arinc messages in FIFO. |
| [out] | recvMsgCountPtr | Total unread messages in FIFO. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| DRV_INVALID_VALUE | : The value is invalid. |
| DRV_FIFO_EMPTY | : The FIFO is empty. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_RXGETFIFOMSGS_01 | HLR_A429_290 | WHEN recvMsgsPtr is NULL or recvMsgCountPtr is NULL, the a429_rxGetFIFOMsgs() function SHALL abort processing and return DRV_INVALID_PARAM. | a429.c:a429_rxGetFIFOMsgs() | Test | Closed |
| LLR_A429_A429_RXGETFIFOMSGS_02 | HLR_A429_290 | WHEN pointers are validated, the a429_rxGetFIFOMsgs() function SHALL invoke readFIFOMsgs() to retrieve available 32-bit words from the Receiver FIFO Message Register at offset 0x0240 + (rxChannelNum * 0x08). | a429.c:a429_rxGetFIFOMsgs() | Test | Closed |
| LLR_A429_A429_RXGETFIFOMSGS_03 | HLR_A429_290 | WHEN words are retrieved from hardware FIFO, the a429_rxGetFIFOMsgs() function SHALL verify bit 32 parity for each word via parityCheck() and transfer verified words into recvMsgsPtr. | a429.c:a429_rxGetFIFOMsgs() | Test | Closed |
| LLR_A429_A429_RXGETFIFOMSGS_04 | HLR_A429_290 | WHEN all operational FIFO retrieval completes successfully, the a429_rxGetFIFOMsgs() function SHALL update recvMsgCountPtr with verified word count and return DRV_SUCCESS. | a429.c:a429_rxGetFIFOMsgs() | Test | Closed |
| DriverStatus a429_rxGetState | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | rxChannelNum, | ||
| ChStatus * | rxStatusPtr ) |
a429_rxGetState.
Get the operation status of the specified receiver channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | rxChannelNum | Receive channel number to access. |
| [out] | rxStatusPtr | Status of receiver channel operational state. |
| DRV_SUCCESS | : Success. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_RXGETSTATE_01 | HLR_A429_290 | WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxGetState() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_rxGetState() | Test | Closed |
| LLR_A429_A429_RXGETSTATE_02 | HLR_A429_290 | WHEN rxChStatePtr is NULL, the a429_rxGetState() function SHALL abort processing and return DRV_INVALID_PARAM. | a429.c:a429_rxGetState() | Test | Closed |
| LLR_A429_A429_RXGETSTATE_03 | HLR_A429_290 | WHEN parameters are validated, the a429_rxGetState() function SHALL read the Receiver Control Register (RX_CR) at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using readA429Reg(). | a429.c:a429_rxGetState() | Test | Closed |
| LLR_A429_A429_RXGETSTATE_04 | HLR_A429_290 | WHEN the register is read successfully, the a429_rxGetState() function SHALL evaluate bit 7 (Receiver Enable) and assign CH_ENABLED if bit 7 is asserted or CH_DISABLED if bit 7 is cleared. | a429.c:a429_rxGetState() | Test | Closed |
| LLR_A429_A429_RXGETSTATE_05 | HLR_A429_290 | WHEN all state acquisition completes successfully, the a429_rxGetState() function SHALL return DRV_SUCCESS. | a429.c:a429_rxGetState() | Test | Closed |
| DriverStatus a429_rxSetLabelFilter | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | rxChannelNum, | ||
| const UInt8 * | filterLabelPtr, | ||
| const UInt8 | filterCount ) |
a429_rxSetLabelFilter.
Filter the message with specified label at the specified receiver channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | rxChannelNum | Receive channel number to access. |
| [in] | filterLabelPtr | Set an array of labels to filter. |
| [in] | filterCount | Set the total number of labels that has been set in the filterLabelPtr array. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_RXSETLABELFILTER_01 | HLR_A429_300 | WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxSetLabelFilter() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_rxSetLabelFilter() | Test | Closed |
| LLR_A429_A429_RXSETLABELFILTER_02 | HLR_A429_300 | WHEN filterLabelsPtr is NULL or filterLabelCount is greater than 255, the a429_rxSetLabelFilter() function SHALL abort processing and return DRV_INVALID_PARAM. | a429.c:a429_rxSetLabelFilter() | Test | Closed |
| LLR_A429_A429_RXSETLABELFILTER_03 | HLR_A429_300 | WHEN parameters are validated, the a429_rxSetLabelFilter() function SHALL construct the 8-segment 256-bit acceptance bitmask from filterLabelsPtr and invoke configLabelFilter() to program the Label Filter Table at offset 0x00C4 + (rxChannelNum * 0x20). | a429.c:a429_rxSetLabelFilter() | Test | Closed |
| LLR_A429_A429_RXSETLABELFILTER_04 | HLR_A429_300 | WHEN all operational label filtering configuration completes successfully, the a429_rxSetLabelFilter() function SHALL return DRV_SUCCESS. | a429.c:a429_rxSetLabelFilter() | Test | Closed |
| DriverStatus a429_rxSetSDIFilter | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | rxChannelNum, | ||
| const UInt8 | sdiValue ) |
a429_rxSetSDIFilter.
Filter the message with specified SDI bit at the specified receiver channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | rxChannelNum | Receive channel number to access. |
| [in] | sdiValue | 2-bit SDI value to filter. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : The module unable to read to a certain register. |
| DRV_INVALID_CONFIG | : The configuration parameter is invalid. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_RXSETSDIFILTER_01 | HLR_A429_21622 | WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxSetSDIFilter() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_rxSetSDIFilter() | Test | Closed |
| LLR_A429_A429_RXSETSDIFILTER_02 | HLR_A429_21622 | WHEN sdiValue is greater than MOD_A429_MAX_SDI_VALUE (3), the a429_rxSetSDIFilter() function SHALL abort processing and return DRV_INVALID_PARAM. | a429.c:a429_rxSetSDIFilter() | Test | Closed |
| LLR_A429_A429_RXSETSDIFILTER_03 | HLR_A429_21622 | WHEN parameters are validated, the a429_rxSetSDIFilter() function SHALL read the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using readA429Reg(). | a429.c:a429_rxSetSDIFilter() | Test | Closed |
| LLR_A429_A429_RXSETSDIFILTER_04 | HLR_A429_21622 | WHEN the register is read successfully, the a429_rxSetSDIFilter() function SHALL set bit 4 (SDI Enable) and configure bit 2 (SD9) and bit 3 (SD10) with the 2-bit sdiValue, then write to physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). | a429.c:a429_rxSetSDIFilter() | Test | Closed |
| LLR_A429_A429_RXSETSDIFILTER_05 | HLR_A429_21622 | WHEN the register write completes successfully, the a429_rxSetSDIFilter() function SHALL wait for a minimum hardware SDI comparator settling delay of 1 millisecond before proceeding. | a429.c:a429_rxSetSDIFilter() | Test | Closed |
| LLR_A429_A429_RXSETSDIFILTER_06 | HLR_A429_21622 | WHEN all operational SDI configuration completes successfully, the a429_rxSetSDIFilter() function SHALL return DRV_SUCCESS. | a429.c:a429_rxSetSDIFilter() | Test | Closed |
| DriverStatus a429_rxSetSpeed | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | rxChannelNum, | ||
| const RxSpeedRate | dataRate ) |
a429_rxSetSpeed.
Set data reception speed at the specified receiver channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | rxChannelNum | Receive channel number to access. |
| [in] | dataRate | Set High Speed (0) for 100Kb/s and set Low Speed (1) for 12.5Kb/s [kbps]. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CONFIG | : The configuration parameter is invalid. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_RXSETSPEED_01 | HLR_A429_20524 | WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxSetSpeed() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_rxSetSpeed() | Test | Closed |
| LLR_A429_A429_RXSETSPEED_02 | HLR_A429_20524 | WHEN rxSpeedRate is not one of RX_CH_SPEED_HIGH (0U) or RX_CH_SPEED_LOW (1U), the a429_rxSetSpeed() function SHALL abort processing and return DRV_INVALID_PARAM. | a429.c:a429_rxSetSpeed() | Test | Closed |
| LLR_A429_A429_RXSETSPEED_03 | HLR_A429_20524 | WHEN parameters are validated, the a429_rxSetSpeed() function SHALL read the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using readA429Reg(). | a429.c:a429_rxSetSpeed() | Test | Closed |
| LLR_A429_A429_RXSETSPEED_04 | HLR_A429_20524 | WHEN the register is read successfully, the a429_rxSetSpeed() function SHALL configure bit 1 (1 for 100 kbps high-speed, 0 for 12.5 kbps low-speed, MMAP_A429_TX_CR_POS_SPEED) and write the updated value to physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). | a429.c:a429_rxSetSpeed() | Test | Closed |
| LLR_A429_A429_RXSETSPEED_05 | HLR_A429_20524 | WHEN the register write completes successfully, the a429_rxSetSpeed() function SHALL wait for a minimum hardware receiver clock rate settling delay of 1 millisecond before proceeding. | a429.c:a429_rxSetSpeed() | Test | Closed |
| LLR_A429_A429_RXSETSPEED_06 | HLR_A429_20524 | WHEN all operational speed configuration completes successfully, the a429_rxSetSpeed() function SHALL return DRV_SUCCESS. | a429.c:a429_rxSetSpeed() | Test | Closed |
| DriverStatus a429_txDisableChannel | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | txChannelNum ) |
a429_txDisableChannel.
Disable the specified transmitter channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | txChannelNum | Transmit channel number to access. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_TXDISABLECHANNEL_01 | HLR_A429_287 | WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txDisableChannel() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_txDisableChannel() | Test | Closed |
| LLR_A429_A429_TXDISABLECHANNEL_02 | HLR_A429_287 | WHEN a peripheral register transaction fails with a status other than DRV_SUCCESS, the a429_txDisableChannel() function SHALL abort processing and return that driver failure status. | a429.c:a429_txDisableChannel() | Test | Closed |
| LLR_A429_A429_TXDISABLECHANNEL_03 | HLR_A429_287 | WHEN channel validation passes, the a429_txDisableChannel() function SHALL read the Transmitter Control Register (TX_CR) at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) from a429DevHdl.baseAddress using readA429Reg(). | a429.c:a429_txDisableChannel() | Test | Closed |
| LLR_A429_A429_TXDISABLECHANNEL_04 | HLR_A429_287 | WHEN the register is read successfully, the a429_txDisableChannel() function SHALL clear bit 2 (Transmitter Channel Enable, MMAP_A429_TX_CR_POS_ENABLE) and write the updated control word to the Transmitter Control Register at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using writeA429Reg(). | a429.c:a429_txDisableChannel() | Test | Closed |
| LLR_A429_A429_TXDISABLECHANNEL_05 | HLR_A429_287 | WHEN the register write completes successfully, the a429_txDisableChannel() function SHALL wait for a minimum hardware line driver deactivation settling delay of 1 millisecond before proceeding. | a429.c:a429_txDisableChannel() | Test | Closed |
| LLR_A429_A429_TXDISABLECHANNEL_06 | HLR_A429_287 | WHEN all operational channel disablement processing completes successfully, the a429_txDisableChannel() function SHALL return DRV_SUCCESS. | a429.c:a429_txDisableChannel() | Test | Closed |
| DriverStatus a429_txDisableParity | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | txChannelNum ) |
a429_txDisableParity.
Disable the parity at the specified transmitter channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | txChannelNum | Transmit channel number to access. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_TXDISABLEPARITY_01 | HLR_A429_20384 | WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txDisableParity() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_txDisableParity() | Test | Closed |
| LLR_A429_A429_TXDISABLEPARITY_02 | HLR_A429_20384 | WHEN channel validation passes, the a429_txDisableParity() function SHALL read the Transmitter Control Register at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using readA429Reg(). | a429.c:a429_txDisableParity() | Test | Closed |
| LLR_A429_A429_TXDISABLEPARITY_03 | HLR_A429_20384 | WHEN the register is read successfully, the a429_txDisableParity() function SHALL clear bit 5 (Parity Enable) and write the updated 32-bit value to physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using writeA429Reg(). | a429.c:a429_txDisableParity() | Test | Closed |
| LLR_A429_A429_TXDISABLEPARITY_04 | HLR_A429_20384 | WHEN the register write completes successfully, the a429_txDisableParity() function SHALL wait for a minimum hardware parity bypass settling delay of 1 millisecond before proceeding. | a429.c:a429_txDisableParity() | Test | Closed |
| LLR_A429_A429_TXDISABLEPARITY_05 | HLR_A429_20384 | WHEN all operational parity disablement completes successfully, the a429_txDisableParity() function SHALL return DRV_SUCCESS. | a429.c:a429_txDisableParity() | Test | Closed |
| DriverStatus a429_txEnableChannel | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | txChannelNum ) |
a429_txEnableChannel.
Enable the specified transmitter channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | txChannelNum | Transmit channel number to access. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_TXENABLECHANNEL_01 | HLR_A429_287 | WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txEnableChannel() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_txEnableChannel() | Test | Closed |
| LLR_A429_A429_TXENABLECHANNEL_02 | HLR_A429_287 | WHEN a peripheral register transaction fails with a status other than DRV_SUCCESS, the a429_txEnableChannel() function SHALL abort processing and return that driver failure status. | a429.c:a429_txEnableChannel() | Test | Closed |
| LLR_A429_A429_TXENABLECHANNEL_03 | HLR_A429_287 | WHEN channel validation passes, the a429_txEnableChannel() function SHALL read the Transmitter Control Register (TX_CR) at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) from a429DevHdl.baseAddress using readA429Reg(). | a429.c:a429_txEnableChannel() | Test | Closed |
| LLR_A429_A429_TXENABLECHANNEL_04 | HLR_A429_287 | WHEN the register is read successfully, the a429_txEnableChannel() function SHALL set bit 2 (Transmitter Channel Enable, MMAP_A429_TX_CR_POS_ENABLE) and write the updated control word to the Transmitter Control Register at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using writeA429Reg(). | a429.c:a429_txEnableChannel() | Test | Closed |
| LLR_A429_A429_TXENABLECHANNEL_05 | HLR_A429_287 | WHEN the register write completes successfully, the a429_txEnableChannel() function SHALL wait for a minimum hardware line driver output settling delay of 1 millisecond before proceeding. | a429.c:a429_txEnableChannel() | Test | Closed |
| LLR_A429_A429_TXENABLECHANNEL_06 | HLR_A429_287 | WHEN all operational channel enablement processing completes successfully, the a429_txEnableChannel() function SHALL return DRV_SUCCESS. | a429.c:a429_txEnableChannel() | Test | Closed |
| DriverStatus a429_txEnableParity | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | txChannelNum, | ||
| const TxChParityMode | parityType ) |
a429_txEnableParity.
Enable the parity and set parity mode at the specified transmitter channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | txChannelNum | Transmit channel number to access. |
| [in] | parityType | Set (1) for even parity and set (0) for odd parity bit. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CONFIG | : The configuration parameter is invalid. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_TXENABLEPARITY_01 | HLR_A429_20384 | WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txEnableParity() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_txEnableParity() | Test | Closed |
| LLR_A429_A429_TXENABLEPARITY_02 | HLR_A429_20384 | WHEN txParityMode is not one of TX_CH_PARITY_ODD (0U) or TX_CH_PARITY_EVEN (1U), the a429_txEnableParity() function SHALL abort processing and return DRV_INVALID_PARAM. | a429.c:a429_txEnableParity() | Test | Closed |
| LLR_A429_A429_TXENABLEPARITY_03 | HLR_A429_20384 | WHEN parameters are validated, the a429_txEnableParity() function SHALL read the Transmitter Control Register at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using readA429Reg(). | a429.c:a429_txEnableParity() | Test | Closed |
| LLR_A429_A429_TXENABLEPARITY_04 | HLR_A429_20384 | WHEN the register is read successfully, the a429_txEnableParity() function SHALL set bit 5 (Parity Enable) and configure bit 4 (Parity Type: 1 for EVEN, 0 for ODD, MMAP_A429_TX_CR_POS_PARITY_TYPE), then write the updated value to physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using writeA429Reg(). | a429.c:a429_txEnableParity() | Test | Closed |
| LLR_A429_A429_TXENABLEPARITY_05 | HLR_A429_20384 | WHEN the register write completes successfully, the a429_txEnableParity() function SHALL wait for a minimum hardware parity logic configuration settling delay of 1 millisecond before proceeding. | a429.c:a429_txEnableParity() | Test | Closed |
| LLR_A429_A429_TXENABLEPARITY_06 | HLR_A429_20384 | WHEN all operational parity enablement completes successfully, the a429_txEnableParity() function SHALL return DRV_SUCCESS. | a429.c:a429_txEnableParity() | Test | Closed |
| DriverStatus a429_txFIFOMsg | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | txChannelNum, | ||
| const UInt32 * | FIFOMsgPtr, | ||
| const UInt32 | msgCount ) |
a429_txFIFOMsg.
Transmit array of 32-bit word to the transmit FIFO at the specified transmitter channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | txChannelNum | Transmit channel number to access. |
| [in] | FIFOMsgPtr | Set the FIFO Message (32-bit) to be passed (array [0-32] maximum Transmitter FIFO Buffer size). |
| [in] | msgCount | Set the value of FIFO Message to be passed. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : The module unable to read to a certain register. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| DRV_FIFO_FULL | : The FIFO is full. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_TXFIFOMSG_01 | HLR_A429_288 | WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txFIFOMsg() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_txFIFOMsg() | Test | Closed |
| LLR_A429_A429_TXFIFOMSG_02 | HLR_A429_288 | WHEN txFIFOBufferPtr is NULL or msgCount is 0 or greater than A429_MAX_TX_FIFO_COUNT (32), the a429_txFIFOMsg() function SHALL abort processing and return DRV_INVALID_PARAM. | a429.c:a429_txFIFOMsg() | Test | Closed |
| LLR_A429_A429_TXFIFOMSG_03 | HLR_A429_288 | WHEN parameters are validated, the a429_txFIFOMsg() function SHALL invoke txBus() to write the sequence of 32-bit ARINC words to the Transmitter FIFO Message Register at offset 0x02C0 + (txChannelNum * 0x08). | a429.c:a429_txFIFOMsg() | Test | Closed |
| LLR_A429_A429_TXFIFOMSG_04 | HLR_A429_288 | WHEN operational transmission processing completes, the a429_txFIFOMsg() function SHALL return that transmission status. | a429.c:a429_txFIFOMsg() | Test | Closed |
| DriverStatus a429_txGetState | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | txChannelNum, | ||
| ChStatus * | txStatusPtr ) |
a429_txGetState
Get the operation status of the transmitter channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | txChannelNum | Transmit channel number to access. |
| [out] | txStatusPtr | Status of transmitter channel operational state. |
| DRV_SUCCESS | : Success. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_TXGETSTATE_01 | HLR_A429_288 | WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txGetState() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_txGetState() | Test | Closed |
| LLR_A429_A429_TXGETSTATE_02 | HLR_A429_288 | WHEN txChStatePtr is NULL, the a429_txGetState() function SHALL abort processing and return DRV_INVALID_PARAM. | a429.c:a429_txGetState() | Test | Closed |
| LLR_A429_A429_TXGETSTATE_03 | HLR_A429_288 | WHEN parameters are validated, the a429_txGetState() function SHALL read the Transmitter Control Register (TX_CR) at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using readA429Reg(). | a429.c:a429_txGetState() | Test | Closed |
| LLR_A429_A429_TXGETSTATE_04 | HLR_A429_288 | WHEN the register is read successfully, the a429_txGetState() function SHALL evaluate bit 2 (Transmitter Enable) and assign CH_ENABLED if bit 2 is asserted or CH_DISABLED if bit 2 is cleared. | a429.c:a429_txGetState() | Test | Closed |
| LLR_A429_A429_TXGETSTATE_05 | HLR_A429_288 | WHEN all state acquisition completes successfully, the a429_txGetState() function SHALL return DRV_SUCCESS. | a429.c:a429_txGetState() | Test | Closed |
| DriverStatus a429_txSetSpeed | ( | const A429DevHandler | a429DevHdl, |
| const UInt8 | txChannelNum, | ||
| const TxSpeedRate | dataRate ) |
a429_txSetSpeed.
Set the data transmission speed at the specified transmitter channel.
| [in] | a429DevHdl | The ARINC429 device handler. |
| [in] | txChannelNum | Transmit channel number to access. |
| [in] | dataRate | Set High Speed (0) for 100Kb/s and set Low Speed (1) for 12.5Kb/s [kbps]. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device or module. |
| DRV_READ_FAILED | : Failed to read from the device or module. |
| DRV_INVALID_CONFIG | : The configuration set is invalid. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_A429_A429_TXSETSPEED_01 | HLR_A429_20383 | WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txSetSpeed() function SHALL abort processing and return DRV_INVALID_CHANNEL. | a429.c:a429_txSetSpeed() | Test | Closed |
| LLR_A429_A429_TXSETSPEED_02 | HLR_A429_20383 | WHEN txSpeedRate is not one of TX_CH_SPEED_HIGH (0U) or TX_CH_SPEED_LOW (1U), the a429_txSetSpeed() function SHALL abort processing and return DRV_INVALID_PARAM. | a429.c:a429_txSetSpeed() | Test | Closed |
| LLR_A429_A429_TXSETSPEED_03 | HLR_A429_20383 | WHEN parameters are validated, the a429_txSetSpeed() function SHALL read the Transmitter Control Register at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using readA429Reg(). | a429.c:a429_txSetSpeed() | Test | Closed |
| LLR_A429_A429_TXSETSPEED_04 | HLR_A429_20383 | WHEN the register is read successfully, the a429_txSetSpeed() function SHALL configure bit 1 (1 for 100 kbps high-speed, 0 for 12.5 kbps low-speed, MMAP_A429_TX_CR_POS_SPEED) and write the updated value to physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using writeA429Reg(). | a429.c:a429_txSetSpeed() | Test | Closed |
| LLR_A429_A429_TXSETSPEED_05 | HLR_A429_20383 | WHEN the register write completes successfully, the a429_txSetSpeed() function SHALL wait for a minimum hardware baud clock generator settling delay of 1 millisecond before proceeding. | a429.c:a429_txSetSpeed() | Test | Closed |
| LLR_A429_A429_TXSETSPEED_06 | HLR_A429_20383 | WHEN all operational speed configuration completes successfully, the a429_txSetSpeed() function SHALL return DRV_SUCCESS. | a429.c:a429_txSetSpeed() | Test | Closed |
1.18.0