HFCC-01 Low-Level Software (LLSW) Rel_6802_HFCC-01-RP-CSAR-CB
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a429.c File Reference
#include "a429.h"
#include "mmapA429.h"
#include "interDrv.h"
#include "timeOper.h"
#include "memoryOper.h"
#include "utilHelper.h"
Include dependency graph for a429.c:
a429.c Node1 a429.c Node2 a429.h Node1->Node2 Node5 mmapA429.h Node1->Node5 Node6 interDrv.h Node1->Node6 Node8 timeOper.h Node1->Node8 Node9 memoryOper.h Node1->Node9 Node10 utilHelper.h Node1->Node10 Node3 commonDataTypes.h Node2->Node3 Node4 driverStatus.h Node2->Node4 Node6->Node3 Node7 interStatus.h Node6->Node7 Node11 INTEGRITY.h Node10->Node11

Macros

#define A429_MAX_RX_CH   (16U)
#define A429_MAX_TX_CH   (8U)
#define A429_MAX_RX_FIFO_COUNT   (64U)
#define A429_MAX_TX_FIFO_COUNT   (32U)
#define A429_FILTER_LABEL_MAP_SEGMENT   (8U)
#define A429_NON_ERROR_PARITY_BIT   (0U)
#define A429_MSG_PARITY_BITMASK   (1 << 31)
#define A429_TX_FIFO_TIMEOUT   (60U)
#define A429_BITS_PER_WORD   (32U)
#define A429_SHIFT_16   (16U)
#define A429_SHIFT_8   (8U)
#define A429_SHIFT_4   (4U)
#define A429_SHIFT_2   (2U)
#define A429_SHIFT_1   (1U)
#define A429_PARITY_LSB_MASK   (1U)

Functions

static DriverStatus writeA429Reg (const UInt32 baseAddress, const UInt32 addrOffset, const UInt32 data)
 writeA429Reg.
static DriverStatus readA429Reg (const UInt32 baseAddress, const UInt32 addrOffset, UInt32 *data)
 readA429Reg.
static DriverStatus txBus (const A429DevHandler a429DevHdl, const UInt8 txChannelNum, const UInt32 *txFIFOBufferPtr, const UInt32 msgCount)
 txBus.
static DriverStatus readFIFOMsgs (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, UInt32 *recvMsgPtr, UInt32 *msgCount)
 readFIFOMsgs.
static DriverStatus configLabelFilter (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, const UInt32 address, const UInt32 *filterDataPtr)
 configLabelFilter.
static MsgParityType parityCheck (const UInt32 arincMsg)
 parityCheck.
DriverStatus a429_reset (const A429DevHandler a429DevHdl)
 a429_reset.
DriverStatus a429_configMCR (const A429DevHandler a429DevHdl, const UInt32 mcrValue)
 a429_configMCR.
DriverStatus a429_txEnableChannel (const A429DevHandler a429DevHdl, const UInt8 txChannelNum)
 a429_txEnableChannel.
DriverStatus a429_txDisableChannel (const A429DevHandler a429DevHdl, const UInt8 txChannelNum)
 a429_txDisableChannel.
DriverStatus a429_txGetState (const A429DevHandler a429DevHdl, const UInt8 txChannelNum, ChStatus *txStatusPtr)
 a429_txGetState
DriverStatus a429_txEnableParity (const A429DevHandler a429DevHdl, const UInt8 txChannelNum, const TxChParityMode parityType)
 a429_txEnableParity.
DriverStatus a429_txDisableParity (const A429DevHandler a429DevHdl, const UInt8 txChannelNum)
 a429_txDisableParity.
DriverStatus a429_txSetSpeed (const A429DevHandler a429DevHdl, const UInt8 txChannelNum, const TxSpeedRate dataRate)
 a429_txSetSpeed.
DriverStatus a429_txFIFOMsg (const A429DevHandler a429DevHdl, const UInt8 txChannelNum, const UInt32 *FIFOMsgPtr, const UInt32 msgCount)
 a429_txFIFOMsg.
DriverStatus a429_rxEnableChannel (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum)
 a429_rxEnableChannel.
DriverStatus a429_rxDisableChannel (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum)
 a429_rxDisableChannel.
DriverStatus a429_rxGetState (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, ChStatus *rxStatusPtr)
 a429_rxGetState.
DriverStatus a429_rxEnableParity (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, const RxChParityMode parityType)
 a429_rxEnableParity.
DriverStatus a429_rxDisableParity (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum)
 a429_rxDisableParity.
DriverStatus a429_rxSetSpeed (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, const RxSpeedRate dataRate)
 a429_rxSetSpeed.
DriverStatus a429_rxSetLabelFilter (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, const UInt8 *filterLabelPtr, const UInt8 filterCount)
 a429_rxSetLabelFilter.
DriverStatus a429_rxClearLabelFilter (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum)
 a429_rxClearLabelFilter.
DriverStatus a429_rxSetSDIFilter (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, const UInt8 sdiValue)
 a429_rxSetSDIFilter.
DriverStatus a429_rxDisableSDIFilter (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum)
 a429_rxDisableSDIFilter.
DriverStatus a429_rxGetFIFOMsgs (const A429DevHandler a429DevHdl, const UInt8 rxChannelNum, UInt32 *recvMsgsPtr, UInt32 *recvMsgCountPtr)
 a429_rxGetFIFOMsgs.
DriverStatus a429_getPbit (const A429DevHandler a429DevHdl, A429PbitStatus *a429PbitPtr)
 a429_getA429Pbit.
DriverStatus a429_getCbit (const A429DevHandler a429DevHdl, A429CbitStatus *a429CbitPtr)
 a429_getCbit.
DriverStatus a429_getTemp (const A429DevHandler a429DevHdl, Float32 *temp)
 a429_getTemp.

Variables

static RxChParityMode rxParityStatus [16]

Detailed Description

Author
Sri Selva Prakash selva.nosp@m..nad.nosp@m.eraja.nosp@m.@tus.nosp@m.as.my, Shasha Batrisyia Mohamad Adzri shash.nosp@m.a.ad.nosp@m.zri@t.nosp@m.usas.nosp@m..my

ARINC429 device driver file

Macro Definition Documentation

◆ A429_BITS_PER_WORD

#define A429_BITS_PER_WORD   (32U)

◆ A429_FILTER_LABEL_MAP_SEGMENT

#define A429_FILTER_LABEL_MAP_SEGMENT   (8U)

◆ A429_MAX_RX_CH

#define A429_MAX_RX_CH   (16U)

◆ A429_MAX_RX_FIFO_COUNT

#define A429_MAX_RX_FIFO_COUNT   (64U)

◆ A429_MAX_TX_CH

#define A429_MAX_TX_CH   (8U)

◆ A429_MAX_TX_FIFO_COUNT

#define A429_MAX_TX_FIFO_COUNT   (32U)

◆ A429_MSG_PARITY_BITMASK

#define A429_MSG_PARITY_BITMASK   (1 << 31)

◆ A429_NON_ERROR_PARITY_BIT

#define A429_NON_ERROR_PARITY_BIT   (0U)

◆ A429_PARITY_LSB_MASK

#define A429_PARITY_LSB_MASK   (1U)

◆ A429_SHIFT_1

#define A429_SHIFT_1   (1U)

◆ A429_SHIFT_16

#define A429_SHIFT_16   (16U)

◆ A429_SHIFT_2

#define A429_SHIFT_2   (2U)

◆ A429_SHIFT_4

#define A429_SHIFT_4   (4U)

◆ A429_SHIFT_8

#define A429_SHIFT_8   (8U)

◆ A429_TX_FIFO_TIMEOUT

#define A429_TX_FIFO_TIMEOUT   (60U)

Function Documentation

◆ a429_configMCR()

DriverStatus a429_configMCR ( const A429DevHandler a429DevHdl,
const UInt32 mcrValue )

a429_configMCR.

Write the caller-supplied MCR configuration value to the ARINC429 Master Control Register. The caller selects the configuration value; this function does not add a delay after the write.

Parameters
[in]a429DevHdlPopulated ARINC429 device handler containing the target device base address.
[in]mcrValue32-bit Master Control Register value to write.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_configMCR

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_CONFIGMCR_01 HLR_A429_287 WHEN MCR configuration is requested, the a429_configMCR() function SHALL write the input mcrValue to the A429 Master Control Register identified by MMAP_A429_MCR. a429.c:a429_configMCR() Test Closed — Recovered
LLR_A429_A429_CONFIGMCR_02 HLR_A429_287 WHEN the MCR write reports a driver failure status other than DRV_SUCCESS, the a429_configMCR() function SHALL return that driver failure status. a429.c:a429_configMCR() Test Closed — Recovered
LLR_A429_A429_CONFIGMCR_03 HLR_A429_287 WHEN the MCR write completes successfully, the a429_configMCR() function SHALL return DRV_SUCCESS without adding a delay in this function. a429.c:a429_configMCR() Test Closed — Recovered

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_configMCR() [Low-Level Device Drivers] Target writeA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   mcrValue (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_configMCR() [Low-Level Device Drivers] Target writeA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   mcrValue (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_configMCR start Entry: a429_configMCR() guard_1 LLR_01: Guard Check Is a register write transaction reports a failure status other than DRV_SUCCESS? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return the failure status `retStatus` guard_1->err_exit_1 YES (TRUE) act_2 LLR_02: Action Step write control word `0x000000C0` (enabling Transmitter Bit 6 `MMAP_A429_MCR_TX_BITMASK` and Receiver Bit 7 `MMAP_A429_MCR_RX_BITMASK`) to the Master Control Register (MCR, physical offset `0x0000`, `MMAP_A429_MCR`) using `writeA429Reg()` guard_1->act_2 NO (FALSE) act_3 LLR_03: Action Step invoke `timeOper_delay(TIMEOPER_USEC, 1)` to allow 1-microsecond hardware core state transition settling act_2->act_3 success_exit LLR_04: Final Exit return `DRV_SUCCESS` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_configMCR in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • mcrValue (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via writeA429Reg() proc_1->proc_2 Data Payload (writeA429Reg) proc_3 LLR_03: Data Payload Transformation • Process payload via () proc_2->proc_3 Data Payload () proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_configMCR Node1 a429_configMCR Node1->Node1 Node2 writeA429Reg Node1->Node2 Node2->Node2 Node3 interDrv_Write32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Write32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
a429_configMCR Node1 a429_configMCR Node1->Node1 Node2 modA429_initReset Node1->Node2 Node2->Node2 Node3 modConfig_init Node2->Node3 Node4 modConfig_reset Node2->Node4 Node3->Node3 Node4->Node4 Node5 modConfig_close Node4->Node5 Node5->Node5

◆ a429_getCbit()

DriverStatus a429_getCbit ( const A429DevHandler a429DevHdl,
A429CbitStatus * a429CbitPtr )

a429_getCbit.

Get CBIT status for ARINC429.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[out]a429CbitPtrPointer for ARINC429 CBIT Status.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_getCbit

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_GETCBIT_01 HLR_A429_23606 WHEN a429CbitPtr is NULL, the a429_getCbit() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:a429_getCbit() Test Closed
LLR_A429_A429_GETCBIT_02 HLR_A429_23606 WHEN the destination pointer is valid, the a429_getCbit() function SHALL read the 32-bit CBIT Status Register at physical offset 0x01F0 (MMAP_A429_CBIT_STAT) using readA429Reg() and decode power fault, undertemperature (bit 5), and overtemperature (bit 6). a429.c:a429_getCbit() Test Closed
LLR_A429_A429_GETCBIT_03 HLR_A429_23606 WHEN the CBIT status register is read successfully, the a429_getCbit() function SHALL read the 32-bit CBIT Data Register at physical offset 0x01F4 (MMAP_A429_CBIT_DATA) using readA429Reg() and decode TX/RX channel loopback mismatches (bits 0-10) into a429CbitPtr. a429.c:a429_getCbit() Test Closed
LLR_A429_A429_GETCBIT_04 HLR_A429_23606 WHEN all CBIT decoding completes successfully, the a429_getCbit() function SHALL return DRV_SUCCESS. a429.c:a429_getCbit() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_getCbit() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_getCbit() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) r_b0->r_t0   *a429CbitPtr (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_getCbit start Entry: a429_getCbit() guard_1 LLR_01: Guard Check Is `a429CbitPtr` is NULL? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) act_2 LLR_02: Action Step read the 32-bit CBIT Status Register at physical offset `0x01F0` (`MMAP_A429_CBIT_STAT`)` (`MMAP_A429_CBIT_STAT`) using `readA429Reg()` and decode power fault, undertemperature (bit 5), and overtemperature (bit 6) guard_1->act_2 NO (FALSE) act_3 LLR_03: Action Step read the 32-bit CBIT Data Register at physical offset `0x01F4` (`MMAP_A429_CBIT_DATA`)` (`MMAP_A429_CBIT_DATA`) using `readA429Reg()` and decode TX/RX channel loopback mismatches (bits 0-10) into `a429CbitPtr` act_2->act_3 success_exit LLR_04: Final Exit return `DRV_SUCCESS` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_getCbit in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via readA429Reg() proc_1->proc_2 Data Payload (readA429Reg) proc_3 LLR_03: Data Payload Transformation • Process payload via readA429Reg() proc_2->proc_3 Data Payload (readA429Reg) proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • a429CbitPtr (A429CbitStatus) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_getCbit Node1 a429_getCbit Node1->Node1 Node2 readA429Reg Node1->Node2 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
a429_getCbit Node1 a429_getCbit Node1->Node1 Node2 modHsb_getA429Cbit Node1->Node2 Node2->Node2

◆ a429_getPbit()

DriverStatus a429_getPbit ( const A429DevHandler a429DevHdl,
A429PbitStatus * a429PbitPtr )

a429_getA429Pbit.

Get PBIT status for ARINC429.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[out]a429PbitPtrPointer for ARINC429 PBIT Status.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_getPbit

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_GETPBIT_01 HLR_A429_405 WHEN a429PbitPtr is NULL, the a429_getPbit() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:a429_getPbit() Test Closed
LLR_A429_A429_GETPBIT_02 HLR_A429_405 WHEN the destination pointer a429PbitPtr is valid, the a429_getPbit() function SHALL read the 32-bit PBIT Status Register at physical offset 0x01EC (MMAP_A429_PBIT_STAT) from the ARINC 429 device base memory address. a429.c:a429_getPbit() Test Closed
LLR_A429_A429_GETPBIT_03 HLR_A429_405 WHEN reading the PBIT Status Register fails (reporting a driver status other than DRV_SUCCESS), the a429_getPbit() function SHALL abort processing and return the reported driver status. a429.c:a429_getPbit() Test Closed
LLR_A429_A429_GETPBIT_04 HLR_A429_405 WHEN the PBIT Status Register is read successfully, the a429_getPbit() function SHALL decode power fault (bit 0), IC ready (bit 1), communication error (bit 2), BIST error (bit 3), TX loopback channels 1-4 (bits 4-7), and RX loopback channels 1-7 (bits 8-14) into a429PbitPtr. a429.c:a429_getPbit() Test Closed
LLR_A429_A429_GETPBIT_05 HLR_A429_405 WHEN all PBIT status decoding completes successfully, the a429_getPbit() function SHALL return DRV_SUCCESS. a429.c:a429_getPbit() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_getPbit() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_getPbit() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) r_b0->r_t0   *a429PbitPtr (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_getPbit start Entry: a429_getPbit() guard_1 LLR_01: Guard Check Is `a429PbitPtr` is NULL? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) act_2 LLR_02: Action Step read the 32-bit PBIT Status Register at physical offset `0x01EC` (`MMAP_A429_PBIT_STAT`)` (`MMAP_A429_PBIT_STAT`) from `a429DevHdl.baseAddress` using `readA429Reg()` guard_1->act_2 NO (FALSE) act_3 LLR_03: Action Step decode power fault (bit 0), IC ready (bit 1), communication error (bit 2), BIST error (bit 3), TX loopback channels 1-4 (bits 4-7), and RX loopback channels 1-7 (bits 8-14) into `a429PbitPtr` act_2->act_3 success_exit LLR_04: Final Exit return `DRV_SUCCESS` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_getPbit in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via readA429Reg() proc_1->proc_2 Data Payload (readA429Reg) proc_3 LLR_03: Data Payload Transformation • Process payload via () proc_2->proc_3 Data Payload () proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • a429PbitPtr (A429PbitStatus) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_getPbit Node1 a429_getPbit Node1->Node1 Node2 readA429Reg Node1->Node2 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
a429_getPbit Node1 a429_getPbit Node1->Node1 Node2 modHsb_getA429Pbit Node1->Node2 Node2->Node2

◆ a429_getTemp()

DriverStatus a429_getTemp ( const A429DevHandler a429DevHdl,
Float32 * temp )

a429_getTemp.

Get ARINC429 temperature value in degree Celsius (C).

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[out]tempThe pointer of temperature value in degree Celsius (C).
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_getTemp

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_GETTEMP_01 HLR_A429_26486 WHEN temp pointer is NULL, the a429_getTemp() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:a429_getTemp() Test Closed
LLR_A429_A429_GETTEMP_02 HLR_A429_26486 WHEN the destination pointer is valid, the a429_getTemp() function SHALL read the 32-bit Temperature Sensor Register at physical offset 0x01F8 from a429DevHdl.baseAddress using readA429Reg(). a429.c:a429_getTemp() Test Closed
LLR_A429_A429_GETTEMP_03 HLR_A429_26486 WHEN the temperature register is read successfully, the a429_getTemp() function SHALL scale the raw 32-bit integer reading by 0.005 °C/LSB to calculate engineering temperature in Celsius and assign to *temp. a429.c:a429_getTemp() Test Closed
LLR_A429_A429_GETTEMP_04 HLR_A429_26486 WHEN temperature acquisition and scaling complete successfully, the a429_getTemp() function SHALL return DRV_SUCCESS. a429.c:a429_getTemp() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_getTemp() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_getTemp() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) r_b0->r_t0   *temp (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_getTemp start Entry: a429_getTemp() guard_1 LLR_01: Guard Check Is `temp` pointer is NULL? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) act_2 LLR_02: Action Step read the 32-bit Temperature Sensor Register at physical offset `0x01F8` from `a429DevHdl.baseAddress` using `readA429Reg()` guard_1->act_2 NO (FALSE) act_3 LLR_03: Action Step scale the raw 32-bit integer reading by `0.005 °C/LSB` to calculate engineering temperature in Celsius and assign to `*temp` act_2->act_3 success_exit LLR_04: Final Exit return `DRV_SUCCESS` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_getTemp in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via readA429Reg() proc_1->proc_2 Data Payload (readA429Reg) proc_3 LLR_03: Data Payload Transformation • Process payload via () proc_2->proc_3 Data Payload () proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • temp (Float32) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_getTemp Node1 a429_getTemp Node1->Node1 Node2 readA429Reg Node1->Node2 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
a429_getTemp Node1 a429_getTemp Node1->Node1 Node2 modHsb_getA429Cbit Node1->Node2 Node2->Node2

◆ a429_reset()

DriverStatus a429_reset ( const A429DevHandler a429DevHdl)

a429_reset.

Reset the ARINC429 module by asserting the module reset control, maintaining the reset assertion for 100 microseconds, deasserting the reset control, waiting 100 microseconds for stabilization, and clearing the receive-channel parity state.

Parameters
[in]a429DevHdlPopulated ARINC429 device handler containing the target device base address.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_reset

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_RESET_01 HLR_A429_30858 WHEN the A429 device handler identifies the target device, the a429_reset() function SHALL assert the A429 module reset control by writing 0x00000001 to the register identified by MMAP_A429_RESET_MODULE. a429.c:a429_reset() Test Closed — Recovered
LLR_A429_A429_RESET_02 HLR_A429_30858 WHEN the reset assertion write completes successfully, the a429_reset() function SHALL maintain the hardware reset assertion for 100 microseconds before deasserting it. a429.c:a429_reset() Test Pending Engineering Review
LLR_A429_A429_RESET_03 HLR_A429_30858 WHEN the reset assertion interval completes, the a429_reset() function SHALL deassert the A429 module reset control by writing 0x00000000 to the register identified by MMAP_A429_RESET_MODULE. a429.c:a429_reset() Test Closed — Recovered
LLR_A429_A429_RESET_04 HLR_A429_30858 WHEN the reset deassertion write completes successfully, the a429_reset() function SHALL wait for 100 microseconds before completing reset processing. a429.c:a429_reset() Test Pending Engineering Review
LLR_A429_A429_RESET_05 HLR_A429_30858 WHEN either reset-register write reports a driver failure, the a429_reset() function SHALL return the reported driver failure status and SHALL NOT report successful reset completion. a429.c:a429_reset() Test Closed — Recovered
LLR_A429_A429_RESET_06 HLR_A429_30858 WHEN reset processing completes successfully, the a429_reset() function SHALL set the receive-channel parity state for each configured receive channel to RX_CH_PARITY_DISABLE. a429.c:a429_reset() Test Pending Derived Approval
LLR_A429_A429_RESET_07 HLR_A429_30858 WHEN all reset operations and receive-channel parity-state initialization complete successfully, the a429_reset() function SHALL return DRV_SUCCESS. a429.c:a429_reset() Test Closed — Recovered

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_reset() [Low-Level Device Drivers] Target writeA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_reset() [Low-Level Device Drivers] Target writeA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_reset start Entry: a429_reset() act_1 LLR_01: Action Step write `0x00000001` to the Module Reset Register (physical offset `0x0028`) using `writeA429Reg()` to assert the hardware IP reset pulse start->act_1 act_2 LLR_02: Action Step invoke `timeOper_delay(TIMEOPER_USEC, 1)` to maintain a 1-microsecond reset assertion pulse width act_1->act_2 act_3 LLR_03: Action Step write `0x00000000` to the Module Reset Register (physical offset `0x0028`) using `writeA429Reg()` to deassert the hardware IP reset act_2->act_3 act_4 LLR_04: Action Step invoke `timeOper_delay(TIMEOPER_USEC, 1)` to provide 1-microsecond hardware post-reset logic stabilization act_3->act_4 success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_reset in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) proc_1 LLR_01: Data Payload Transformation • Process payload via writeA429Reg() in_store->proc_1 Data Payload (writeA429Reg) proc_2 LLR_02: Data Payload Transformation • Process payload via () proc_1->proc_2 Data Payload () proc_3 LLR_03: Data Payload Transformation • Process payload via writeA429Reg() proc_2->proc_3 Data Payload (writeA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via () proc_3->proc_4 Data Payload () proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_reset Node1 a429_reset Node1->Node1 Node2 writeA429Reg Node1->Node2 Node2->Node2 Node3 interDrv_Write32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Write32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
a429_reset Node1 a429_reset Node1->Node1 Node2 modA429_initReset Node1->Node2 Node2->Node2 Node3 modConfig_init Node2->Node3 Node4 modConfig_reset Node2->Node4 Node3->Node3 Node4->Node4 Node5 modConfig_close Node4->Node5 Node5->Node5

◆ a429_rxClearLabelFilter()

DriverStatus a429_rxClearLabelFilter ( const A429DevHandler a429DevHdl,
const UInt8 rxChannelNum )

a429_rxClearLabelFilter.

Clear the filter label at the specified receiver channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]rxChannelNumReceive channel number to access.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_INVALID_CHANNEL: The channel number is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_rxClearLabelFilter

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_RXCLEARLABELFILTER_01 HLR_A429_300 WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxClearLabelFilter() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_rxClearLabelFilter() Test Closed
LLR_A429_A429_RXCLEARLABELFILTER_02 HLR_A429_300 WHEN channel validation passes, the a429_rxClearLabelFilter() function SHALL clear all 8 bitmask segments to 0x00000000 and invoke configLabelFilter() to reset the Label Filter Table at offset 0x00C4 + (rxChannelNum * 0x20). a429.c:a429_rxClearLabelFilter() Test Closed
LLR_A429_A429_RXCLEARLABELFILTER_03 HLR_A429_300 WHEN all operational filter clearing completes successfully, the a429_rxClearLabelFilter() function SHALL return DRV_SUCCESS. a429.c:a429_rxClearLabelFilter() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_rxClearLabelFilter() [Low-Level Device Drivers] Target configLabelFilter() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   rxChannelNum (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_rxClearLabelFilter() [Low-Level Device Drivers] Target configLabelFilter() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   rxChannelNum (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_rxClearLabelFilter start Entry: a429_rxClearLabelFilter() guard_1 LLR_01: Guard Check Is `rxChannelNum` is greater than or equal to `A429_MAX_RX_CH` (7)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is channel validation passes? guard_1->guard_2 err_exit_2 LLR_02 Error Exit clear all 8 bitmask segments to `0x00000000` and invoke `configLabelFilter()` to reset the Label Filter Table at offset `0x00C4 + (rxChannelNum * 0x20)` guard_2->err_exit_2 YES (TRUE) success_exit LLR_03: Final Exit return `DRV_SUCCESS` guard_2->success_exit NO (FALSE)
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_rxClearLabelFilter in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • rxChannelNum (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via configLabelFilter() proc_1->proc_2 Data Payload (configLabelFilter) proc_3 LLR_03: Status Output Packaging • Format Return Payload: DriverStatus proc_2->proc_3 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_3->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_rxClearLabelFilter Node1 a429_rxClearLabelFilter Node1->Node1 Node2 configLabelFilter Node1->Node2 Node2->Node2 Node3 writeA429Reg Node2->Node3 Node3->Node3 Node4 interDrv_Write32 Node3->Node4 Node4->Node4 Node5 interDrv_isAddressValid Node4->Node5 Node6 memoryMap_Write32 Node4->Node6 Node5->Node5 Node6->Node6
Here is the caller graph for this function:
a429_rxClearLabelFilter Node1 a429_rxClearLabelFilter Node1->Node1 Node2 modA429_recvChDisable Node1->Node2 Node2->Node2 Node3 modA429_initReset Node2->Node3 Node3->Node3 Node4 modConfig_init Node3->Node4 Node5 modConfig_reset Node3->Node5 Node4->Node4 Node5->Node5 Node6 modConfig_close Node5->Node6 Node6->Node6

◆ a429_rxDisableChannel()

DriverStatus a429_rxDisableChannel ( const A429DevHandler a429DevHdl,
const UInt8 rxChannelNum )

a429_rxDisableChannel.

Disable the specified receiver channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]rxChannelNumReceive channel number to access.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_rxDisableChannel

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_RXDISABLECHANNEL_01 HLR_A429_289 WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxDisableChannel() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_rxDisableChannel() Test Closed
LLR_A429_A429_RXDISABLECHANNEL_02 HLR_A429_289 WHEN channel validation passes, the a429_rxDisableChannel() function SHALL read the Receiver Control Register (RX_CR) at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) from a429DevHdl.baseAddress using readA429Reg(). a429.c:a429_rxDisableChannel() Test Closed
LLR_A429_A429_RXDISABLECHANNEL_03 HLR_A429_289 WHEN the register is read successfully, the a429_rxDisableChannel() function SHALL clear bit 7 (Receiver Channel Enable, MMAP_A429_RX_CR_POS_ENABLE) and write the updated control word to the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). a429.c:a429_rxDisableChannel() Test Closed
LLR_A429_A429_RXDISABLECHANNEL_04 HLR_A429_289 WHEN the register write completes successfully, the a429_rxDisableChannel() function SHALL wait for a minimum hardware receiver deactivation settling delay of 1 millisecond before proceeding. a429.c:a429_rxDisableChannel() Test Closed
LLR_A429_A429_RXDISABLECHANNEL_05 HLR_A429_289 WHEN all operational receiver disablement completes successfully, the a429_rxDisableChannel() function SHALL return DRV_SUCCESS. a429.c:a429_rxDisableChannel() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_rxDisableChannel() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   rxChannelNum (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_rxDisableChannel() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   rxChannelNum (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_rxDisableChannel start Entry: a429_rxDisableChannel() guard_1 LLR_01: Guard Check Is `rxChannelNum` is greater than or equal to `A429_MAX_RX_CH` (7)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is channel validation passes? guard_1->guard_2 err_exit_2 LLR_02 Error Exit read the Receiver Control Register (RX_CR) at physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) from `a429DevHdl.baseAddress` using `readA429Reg()` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step clear bit 7 (Receiver Channel Enable, `MMAP_A429_RX_CR_POS_ENABLE`) and write the updated control word to the Receiver Control Register at physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) using `writeA429Reg()` guard_2->act_3 NO (FALSE) act_4 LLR_04: Action Step invoke `timeOper_delay(TIMEOPER_MSEC, 1)` to execute a 1-millisecond hardware receiver deactivation settling delay act_3->act_4 success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_rxDisableChannel in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • rxChannelNum (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via readA429Reg() proc_1->proc_2 Data Payload (readA429Reg) proc_3 LLR_03: Data Payload Transformation • Process payload via writeA429Reg() proc_2->proc_3 Data Payload (writeA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via () proc_3->proc_4 Data Payload () proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_rxDisableChannel Node1 a429_rxDisableChannel Node1->Node1 Node2 readA429Reg Node1->Node2 Node6 writeA429Reg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
a429_rxDisableChannel Node1 a429_rxDisableChannel Node1->Node1 Node2 modA429_recvChDisable Node1->Node2 Node2->Node2 Node3 modA429_initReset Node2->Node3 Node3->Node3 Node4 modConfig_init Node3->Node4 Node5 modConfig_reset Node3->Node5 Node4->Node4 Node5->Node5 Node6 modConfig_close Node5->Node6 Node6->Node6

◆ a429_rxDisableParity()

DriverStatus a429_rxDisableParity ( const A429DevHandler a429DevHdl,
const UInt8 rxChannelNum )

a429_rxDisableParity.

Disable parity at the specified receiver channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]rxChannelNumReceive channel number to access.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_rxDisableParity

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_RXDISABLEPARITY_01 HLR_A429_20528 WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxDisableParity() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_rxDisableParity() Test Closed
LLR_A429_A429_RXDISABLEPARITY_02 HLR_A429_20528 WHEN channel validation passes, the a429_rxDisableParity() function SHALL read the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using readA429Reg(). a429.c:a429_rxDisableParity() Test Closed
LLR_A429_A429_RXDISABLEPARITY_03 HLR_A429_20528 WHEN the register is read successfully, the a429_rxDisableParity() function SHALL clear bit 5 (Parity Checking Enable) and write the updated 32-bit value to physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). a429.c:a429_rxDisableParity() Test Closed
LLR_A429_A429_RXDISABLEPARITY_04 HLR_A429_20528 WHEN the register write completes successfully, the a429_rxDisableParity() function SHALL wait for a minimum hardware parity bypass settling delay of 1 millisecond before proceeding. a429.c:a429_rxDisableParity() Test Closed
LLR_A429_A429_RXDISABLEPARITY_05 HLR_A429_20528 WHEN all operational parity disablement completes successfully, the a429_rxDisableParity() function SHALL return DRV_SUCCESS. a429.c:a429_rxDisableParity() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_rxDisableParity() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   rxChannelNum (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_rxDisableParity() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   rxChannelNum (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_rxDisableParity start Entry: a429_rxDisableParity() guard_1 LLR_01: Guard Check Is `rxChannelNum` is greater than or equal to `A429_MAX_RX_CH` (7)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is channel validation passes? guard_1->guard_2 err_exit_2 LLR_02 Error Exit read the Receiver Control Register at physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) using `readA429Reg()` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step clear bit 5 (Parity Checking Enable) and write the updated 32-bit value to physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) using `writeA429Reg()` guard_2->act_3 NO (FALSE) act_4 LLR_04: Action Step invoke `timeOper_delay(TIMEOPER_MSEC, 1)` for 1-millisecond parity bypass settling act_3->act_4 success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_rxDisableParity in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • rxChannelNum (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via readA429Reg() proc_1->proc_2 Data Payload (readA429Reg) proc_3 LLR_03: Data Payload Transformation • Process payload via writeA429Reg() proc_2->proc_3 Data Payload (writeA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via () proc_3->proc_4 Data Payload () proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_rxDisableParity Node1 a429_rxDisableParity Node1->Node1 Node2 readA429Reg Node1->Node2 Node6 writeA429Reg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
a429_rxDisableParity Node1 a429_rxDisableParity Node1->Node1 Node2 a429_rxEnableParity Node1->Node2 Node3 modA429_recvConfig Node1->Node3 Node4 modA429_recvChDisable Node1->Node4 Node2->Node2 Node2->Node3 Node3->Node3 Node4->Node4 Node5 modA429_initReset Node4->Node5 Node5->Node5 Node6 modConfig_init Node5->Node6 Node7 modConfig_reset Node5->Node7 Node6->Node6 Node7->Node7 Node8 modConfig_close Node7->Node8 Node8->Node8

◆ a429_rxDisableSDIFilter()

DriverStatus a429_rxDisableSDIFilter ( const A429DevHandler a429DevHdl,
const UInt8 rxChannelNum )

a429_rxDisableSDIFilter.

Disable filtering the message with specified SDI bit at the specified receiver channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]rxChannelNumReceive channel number to access.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_rxDisableSDIFilter

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_RXDISABLESDIFILTER_01 HLR_A429_21622 WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxDisableSDIFilter() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_rxDisableSDIFilter() Test Closed
LLR_A429_A429_RXDISABLESDIFILTER_02 HLR_A429_21622 WHEN channel validation passes, the a429_rxDisableSDIFilter() function SHALL read the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using readA429Reg(). a429.c:a429_rxDisableSDIFilter() Test Closed
LLR_A429_A429_RXDISABLESDIFILTER_03 HLR_A429_21622 WHEN the register is read successfully, the a429_rxDisableSDIFilter() function SHALL clear bit 4 (SDI Enable), bit 2 (SD9), and bit 3 (SD10), then write to physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). a429.c:a429_rxDisableSDIFilter() Test Closed
LLR_A429_A429_RXDISABLESDIFILTER_04 HLR_A429_21622 WHEN the register write completes successfully, the a429_rxDisableSDIFilter() function SHALL wait for a minimum hardware SDI bypass settling delay of 1 millisecond before proceeding. a429.c:a429_rxDisableSDIFilter() Test Closed
LLR_A429_A429_RXDISABLESDIFILTER_05 HLR_A429_21622 WHEN all operational SDI disablement completes successfully, the a429_rxDisableSDIFilter() function SHALL return DRV_SUCCESS. a429.c:a429_rxDisableSDIFilter() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_rxDisableSDIFilter() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   rxChannelNum (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_rxDisableSDIFilter() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   rxChannelNum (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_rxDisableSDIFilter start Entry: a429_rxDisableSDIFilter() guard_1 LLR_01: Guard Check Is `rxChannelNum` is greater than or equal to `A429_MAX_RX_CH` (7)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is channel validation passes? guard_1->guard_2 err_exit_2 LLR_02 Error Exit read the Receiver Control Register at physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) using `readA429Reg()` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step clear bit 4 (SDI Enable), bit 2 (SD9), and bit 3 (SD10), then write to physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) using `writeA429Reg()` guard_2->act_3 NO (FALSE) act_4 LLR_04: Action Step invoke `timeOper_delay(TIMEOPER_MSEC, 1)` for 1-millisecond SDI bypass settling act_3->act_4 success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_rxDisableSDIFilter in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • rxChannelNum (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via readA429Reg() proc_1->proc_2 Data Payload (readA429Reg) proc_3 LLR_03: Data Payload Transformation • Process payload via writeA429Reg() proc_2->proc_3 Data Payload (writeA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via () proc_3->proc_4 Data Payload () proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_rxDisableSDIFilter Node1 a429_rxDisableSDIFilter Node1->Node1 Node2 readA429Reg Node1->Node2 Node6 writeA429Reg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
a429_rxDisableSDIFilter Node1 a429_rxDisableSDIFilter Node1->Node1 Node2 modA429_recvChDisable Node1->Node2 Node2->Node2 Node3 modA429_initReset Node2->Node3 Node3->Node3 Node4 modConfig_init Node3->Node4 Node5 modConfig_reset Node3->Node5 Node4->Node4 Node5->Node5 Node6 modConfig_close Node5->Node6 Node6->Node6

◆ a429_rxEnableChannel()

DriverStatus a429_rxEnableChannel ( const A429DevHandler a429DevHdl,
const UInt8 rxChannelNum )

a429_rxEnableChannel.

Enable the specified receiver channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]rxChannelNumReceive channel number to access.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_rxEnableChannel

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_RXENABLECHANNEL_01 HLR_A429_289 WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxEnableChannel() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_rxEnableChannel() Test Closed
LLR_A429_A429_RXENABLECHANNEL_02 HLR_A429_289 WHEN channel validation passes, the a429_rxEnableChannel() function SHALL read the Receiver Control Register (RX_CR) at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) from a429DevHdl.baseAddress using readA429Reg(). a429.c:a429_rxEnableChannel() Test Closed
LLR_A429_A429_RXENABLECHANNEL_03 HLR_A429_289 WHEN the register is read successfully, the a429_rxEnableChannel() function SHALL set bit 7 (Receiver Channel Enable, MMAP_A429_RX_CR_POS_ENABLE) and write the updated control word to the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). a429.c:a429_rxEnableChannel() Test Closed
LLR_A429_A429_RXENABLECHANNEL_04 HLR_A429_289 WHEN the register write completes successfully, the a429_rxEnableChannel() function SHALL wait for a minimum hardware receiver input amplifier settling delay of 1 millisecond before proceeding. a429.c:a429_rxEnableChannel() Test Closed
LLR_A429_A429_RXENABLECHANNEL_05 HLR_A429_289 WHEN all operational receiver enablement completes successfully, the a429_rxEnableChannel() function SHALL return DRV_SUCCESS. a429.c:a429_rxEnableChannel() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_rxEnableChannel() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   rxChannelNum (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_rxEnableChannel() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   rxChannelNum (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_rxEnableChannel start Entry: a429_rxEnableChannel() guard_1 LLR_01: Guard Check Is `rxChannelNum` is greater than or equal to `A429_MAX_RX_CH` (7)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is channel validation passes? guard_1->guard_2 err_exit_2 LLR_02 Error Exit read the Receiver Control Register (RX_CR) at physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) from `a429DevHdl.baseAddress` using `readA429Reg()` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step set bit 7 (Receiver Channel Enable, `MMAP_A429_RX_CR_POS_ENABLE`) and write the updated control word to the Receiver Control Register at physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) using `writeA429Reg()` guard_2->act_3 NO (FALSE) act_4 LLR_04: Action Step invoke `timeOper_delay(TIMEOPER_MSEC, 1)` to execute a 1-millisecond hardware receiver input amplifier settling delay act_3->act_4 success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_rxEnableChannel in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • rxChannelNum (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via readA429Reg() proc_1->proc_2 Data Payload (readA429Reg) proc_3 LLR_03: Data Payload Transformation • Process payload via writeA429Reg() proc_2->proc_3 Data Payload (writeA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via () proc_3->proc_4 Data Payload () proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_rxEnableChannel Node1 a429_rxEnableChannel Node1->Node1 Node2 readA429Reg Node1->Node2 Node6 writeA429Reg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
a429_rxEnableChannel Node1 a429_rxEnableChannel Node1->Node1 Node2 modA429_recvChEnable Node1->Node2 Node2->Node2

◆ a429_rxEnableParity()

DriverStatus a429_rxEnableParity ( const A429DevHandler a429DevHdl,
const UInt8 rxChannelNum,
const RxChParityMode parityType )

a429_rxEnableParity.

Enable parity at the specified receiver channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]rxChannelNumReceive channel number to access.
[in]parityTypeSet (1) for even parity and set (0) for odd parity bit.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CONFIG: The configuration parameter is invalid.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_rxEnableParity

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_RXENABLEPARITY_01 HLR_A429_20528 WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxEnableParity() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_rxEnableParity() Test Closed
LLR_A429_A429_RXENABLEPARITY_02 HLR_A429_20528 WHEN rxParityMode is not one of RX_CH_PARITY_ODD (0U) or RX_CH_PARITY_EVEN (1U), the a429_rxEnableParity() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:a429_rxEnableParity() Test Closed
LLR_A429_A429_RXENABLEPARITY_03 HLR_A429_20528 WHEN parameters are validated, the a429_rxEnableParity() function SHALL read the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using readA429Reg(). a429.c:a429_rxEnableParity() Test Closed
LLR_A429_A429_RXENABLEPARITY_04 HLR_A429_20528 WHEN the register is read successfully, the a429_rxEnableParity() function SHALL set bit 5 (Parity Checking Enable) and write the updated value to physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). a429.c:a429_rxEnableParity() Test Closed
LLR_A429_A429_RXENABLEPARITY_05 HLR_A429_20528 WHEN the register write completes successfully, the a429_rxEnableParity() function SHALL wait for a minimum hardware parity verification settling delay of 1 millisecond before proceeding. a429.c:a429_rxEnableParity() Test Closed
LLR_A429_A429_RXENABLEPARITY_06 HLR_A429_20528 WHEN all operational parity enablement completes successfully, the a429_rxEnableParity() function SHALL return DRV_SUCCESS. a429.c:a429_rxEnableParity() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_rxEnableParity() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   rxChannelNum (Flag) l_t2->l_b2   parityType (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_rxEnableParity() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   rxChannelNum (Payload) l_t2->l_b2   parityType (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_rxEnableParity start Entry: a429_rxEnableParity() guard_1 LLR_01: Guard Check Is `rxChannelNum` is greater than or equal to `A429_MAX_RX_CH` (7)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `rxParityMode` is not one of `RX_CH_PARITY_ODD (0U)` or `RX_CH_PARITY_EVEN (1U)`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step read the Receiver Control Register at physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) using `readA429Reg()` guard_2->act_3 NO (FALSE) act_4 LLR_04: Action Step set bit 5 (Parity Checking Enable) and write the updated value to physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) using `writeA429Reg()` act_3->act_4 act_5 LLR_05: Action Step invoke `timeOper_delay(TIMEOPER_MSEC, 1)` for 1-millisecond hardware parity verification settling act_4->act_5 success_exit LLR_06: Final Exit return `DRV_SUCCESS` act_5->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_rxEnableParity in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • rxChannelNum (const UInt8) • parityType (const RxChParityMode) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via readA429Reg() proc_2->proc_3 Data Payload (readA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via writeA429Reg() proc_3->proc_4 Data Payload (writeA429Reg) proc_5 LLR_05: Data Payload Transformation • Process payload via () proc_4->proc_5 Data Payload () proc_6 LLR_06: Status Output Packaging • Format Return Payload: DriverStatus proc_5->proc_6 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_6->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_rxEnableParity Node1 a429_rxEnableParity Node1->Node1 Node2 a429_rxDisableParity Node1->Node2 Node3 readA429Reg Node1->Node3 Node7 writeA429Reg Node1->Node7 Node2->Node2 Node2->Node3 Node2->Node7 Node3->Node3 Node4 interDrv_Read32 Node3->Node4 Node4->Node4 Node5 interDrv_isAddressValid Node4->Node5 Node6 memoryMap_Read32 Node4->Node6 Node5->Node5 Node6->Node6 Node7->Node7 Node8 interDrv_Write32 Node7->Node8 Node8->Node5 Node8->Node8 Node9 memoryMap_Write32 Node8->Node9 Node9->Node9
Here is the caller graph for this function:
a429_rxEnableParity Node1 a429_rxEnableParity Node1->Node1 Node2 modA429_recvConfig Node1->Node2 Node2->Node2

◆ a429_rxGetFIFOMsgs()

DriverStatus a429_rxGetFIFOMsgs ( const A429DevHandler a429DevHdl,
const UInt8 rxChannelNum,
UInt32 * recvMsgsPtr,
UInt32 * recvMsgCountPtr )

a429_rxGetFIFOMsgs.

Retrieve the messages in receive FIFO and FIFO count at the specified receiver channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]rxChannelNumReceive channel number to access.
[out]recvMsgsPtrAn array of unread 32-bit Arinc messages in FIFO.
[out]recvMsgCountPtrTotal unread messages in FIFO.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.
DRV_INVALID_VALUE: The value is invalid.
DRV_FIFO_EMPTY: The FIFO is empty.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_rxGetFIFOMsgs

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_RXGETFIFOMSGS_01 HLR_A429_290 WHEN recvMsgsPtr is NULL or recvMsgCountPtr is NULL, the a429_rxGetFIFOMsgs() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:a429_rxGetFIFOMsgs() Test Closed
LLR_A429_A429_RXGETFIFOMSGS_02 HLR_A429_290 WHEN pointers are validated, the a429_rxGetFIFOMsgs() function SHALL invoke readFIFOMsgs() to retrieve available 32-bit words from the Receiver FIFO Message Register at offset 0x0240 + (rxChannelNum * 0x08). a429.c:a429_rxGetFIFOMsgs() Test Closed
LLR_A429_A429_RXGETFIFOMSGS_03 HLR_A429_290 WHEN words are retrieved from hardware FIFO, the a429_rxGetFIFOMsgs() function SHALL verify bit 32 parity for each word via parityCheck() and transfer verified words into recvMsgsPtr. a429.c:a429_rxGetFIFOMsgs() Test Closed
LLR_A429_A429_RXGETFIFOMSGS_04 HLR_A429_290 WHEN all operational FIFO retrieval completes successfully, the a429_rxGetFIFOMsgs() function SHALL update recvMsgCountPtr with verified word count and return DRV_SUCCESS. a429.c:a429_rxGetFIFOMsgs() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_rxGetFIFOMsgs() [Low-Level Device Drivers] Target readFIFOMsgs() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   rxChannelNum (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_rxGetFIFOMsgs() [Low-Level Device Drivers] Target readFIFOMsgs() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   rxChannelNum (Payload) r_b0->r_t0   *recvMsgsPtr (Output Data) r_b1->r_t1   *recvMsgCountPtr (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_rxGetFIFOMsgs start Entry: a429_rxGetFIFOMsgs() guard_1 LLR_01: Guard Check Is `recvMsgsPtr` is NULL or `recvMsgCountPtr` is NULL? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) act_2 LLR_02: Action Step invoke `readFIFOMsgs()` to retrieve available 32-bit words from the Receiver FIFO Message Register at offset `0x0240 + (rxChannelNum * 0x08)` guard_1->act_2 NO (FALSE) act_3 LLR_03: Action Step verify bit 32 parity for each word via `parityCheck()` and transfer verified words into `recvMsgsPtr` act_2->act_3 success_exit LLR_04: Final Exit update `recvMsgCountPtr` with verified word count and return `DRV_SUCCESS` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_rxGetFIFOMsgs in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • rxChannelNum (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via readFIFOMsgs() proc_1->proc_2 Data Payload (readFIFOMsgs) proc_3 LLR_03: Data Payload Transformation • Process payload via parityCheck() proc_2->proc_3 Data Payload (parityCheck) proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • recvMsgsPtr (UInt32) • recvMsgCountPtr (UInt32) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_rxGetFIFOMsgs Node1 a429_rxGetFIFOMsgs Node1->Node1 Node2 parityCheck Node1->Node2 Node3 readFIFOMsgs Node1->Node3 Node2->Node2 Node3->Node3 Node4 readA429Reg Node3->Node4 Node8 writeA429Reg Node3->Node8 Node4->Node4 Node5 interDrv_Read32 Node4->Node5 Node5->Node5 Node6 interDrv_isAddressValid Node5->Node6 Node7 memoryMap_Read32 Node5->Node7 Node6->Node6 Node7->Node7 Node8->Node8 Node9 interDrv_Write32 Node8->Node9 Node9->Node6 Node9->Node9 Node10 memoryMap_Write32 Node9->Node10 Node10->Node10
Here is the caller graph for this function:
a429_rxGetFIFOMsgs Node1 a429_rxGetFIFOMsgs Node1->Node1 Node2 modA429_recvFIFO Node1->Node2 Node2->Node2

◆ a429_rxGetState()

DriverStatus a429_rxGetState ( const A429DevHandler a429DevHdl,
const UInt8 rxChannelNum,
ChStatus * rxStatusPtr )

a429_rxGetState.

Get the operation status of the specified receiver channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]rxChannelNumReceive channel number to access.
[out]rxStatusPtrStatus of receiver channel operational state.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_rxGetState

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_RXGETSTATE_01 HLR_A429_290 WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxGetState() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_rxGetState() Test Closed
LLR_A429_A429_RXGETSTATE_02 HLR_A429_290 WHEN rxChStatePtr is NULL, the a429_rxGetState() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:a429_rxGetState() Test Closed
LLR_A429_A429_RXGETSTATE_03 HLR_A429_290 WHEN parameters are validated, the a429_rxGetState() function SHALL read the Receiver Control Register (RX_CR) at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using readA429Reg(). a429.c:a429_rxGetState() Test Closed
LLR_A429_A429_RXGETSTATE_04 HLR_A429_290 WHEN the register is read successfully, the a429_rxGetState() function SHALL evaluate bit 7 (Receiver Enable) and assign CH_ENABLED if bit 7 is asserted or CH_DISABLED if bit 7 is cleared. a429.c:a429_rxGetState() Test Closed
LLR_A429_A429_RXGETSTATE_05 HLR_A429_290 WHEN all state acquisition completes successfully, the a429_rxGetState() function SHALL return DRV_SUCCESS. a429.c:a429_rxGetState() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_rxGetState() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   rxChannelNum (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_rxGetState() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   rxChannelNum (Payload) r_b0->r_t0   *rxStatusPtr (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_rxGetState start Entry: a429_rxGetState() guard_1 LLR_01: Guard Check Is `rxChannelNum` is greater than or equal to `A429_MAX_RX_CH` (7)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `rxChStatePtr` is NULL? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step read the Receiver Control Register (RX_CR) at physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) using `readA429Reg()` guard_2->act_3 NO (FALSE) act_4 LLR_04: Action Step evaluate bit 7 (Receiver Enable) and assign `CH_ENABLED` if bit 7 is asserted or `CH_DISABLED` if bit 7 is cleared act_3->act_4 success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_rxGetState in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • rxChannelNum (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via readA429Reg() proc_2->proc_3 Data Payload (readA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via () proc_3->proc_4 Data Payload () proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • rxStatusPtr (ChStatus) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_rxGetState Node1 a429_rxGetState Node1->Node1 Node2 readA429Reg Node1->Node2 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
a429_rxGetState Node1 a429_rxGetState Node1->Node1 Node2 modA429_recvFIFO Node1->Node2 Node2->Node2

◆ a429_rxSetLabelFilter()

DriverStatus a429_rxSetLabelFilter ( const A429DevHandler a429DevHdl,
const UInt8 rxChannelNum,
const UInt8 * filterLabelPtr,
const UInt8 filterCount )

a429_rxSetLabelFilter.

Filter the message with specified label at the specified receiver channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]rxChannelNumReceive channel number to access.
[in]filterLabelPtrSet an array of labels to filter.
[in]filterCountSet the total number of labels that has been set in the filterLabelPtr array.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation it returns DRV_SUCCESS. Otherwise related error message is returned
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_rxSetLabelFilter

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_RXSETLABELFILTER_01 HLR_A429_300 WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxSetLabelFilter() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_rxSetLabelFilter() Test Closed
LLR_A429_A429_RXSETLABELFILTER_02 HLR_A429_300 WHEN filterLabelsPtr is NULL or filterLabelCount is greater than 255, the a429_rxSetLabelFilter() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:a429_rxSetLabelFilter() Test Closed
LLR_A429_A429_RXSETLABELFILTER_03 HLR_A429_300 WHEN parameters are validated, the a429_rxSetLabelFilter() function SHALL construct the 8-segment 256-bit acceptance bitmask from filterLabelsPtr and invoke configLabelFilter() to program the Label Filter Table at offset 0x00C4 + (rxChannelNum * 0x20). a429.c:a429_rxSetLabelFilter() Test Closed
LLR_A429_A429_RXSETLABELFILTER_04 HLR_A429_300 WHEN all operational label filtering configuration completes successfully, the a429_rxSetLabelFilter() function SHALL return DRV_SUCCESS. a429.c:a429_rxSetLabelFilter() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_rxSetLabelFilter() [Low-Level Device Drivers] Target configLabelFilter() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   rxChannelNum (Flag) l_t2->l_b2   filterLabelPtr (Flag) l_t3->l_b3   filterCount (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_rxSetLabelFilter() [Low-Level Device Drivers] Target configLabelFilter() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   rxChannelNum (Payload) l_t2->l_b2   filterLabelPtr (Payload) l_t3->l_b3   filterCount (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_rxSetLabelFilter start Entry: a429_rxSetLabelFilter() guard_1 LLR_01: Guard Check Is `rxChannelNum` is greater than or equal to `A429_MAX_RX_CH` (7)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `filterLabelsPtr` is NULL or `filterLabelCount` is greater than 255? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step construct the 8-segment 256-bit acceptance bitmask from `filterLabelsPtr` and invoke `configLabelFilter()` to program the Label Filter Table at offset `0x00C4 + (rxChannelNum * 0x20)` guard_2->act_3 NO (FALSE) success_exit LLR_04: Final Exit return `DRV_SUCCESS` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_rxSetLabelFilter in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • rxChannelNum (const UInt8) • filterLabelPtr (const UInt8) • filterCount (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via configLabelFilter() proc_2->proc_3 Data Payload (configLabelFilter) proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_rxSetLabelFilter Node1 a429_rxSetLabelFilter Node1->Node1 Node2 configLabelFilter Node1->Node2 Node2->Node2 Node3 writeA429Reg Node2->Node3 Node3->Node3 Node4 interDrv_Write32 Node3->Node4 Node4->Node4 Node5 interDrv_isAddressValid Node4->Node5 Node6 memoryMap_Write32 Node4->Node6 Node5->Node5 Node6->Node6
Here is the caller graph for this function:
a429_rxSetLabelFilter Node1 a429_rxSetLabelFilter Node1->Node1 Node2 modA429_recvSetLabelFilter Node1->Node2 Node2->Node2

◆ a429_rxSetSDIFilter()

DriverStatus a429_rxSetSDIFilter ( const A429DevHandler a429DevHdl,
const UInt8 rxChannelNum,
const UInt8 sdiValue )

a429_rxSetSDIFilter.

Filter the message with specified SDI bit at the specified receiver channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]rxChannelNumReceive channel number to access.
[in]sdiValue2-bit SDI value to filter.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: The module unable to read to a certain register.
DRV_INVALID_CONFIG: The configuration parameter is invalid.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_rxSetSDIFilter

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_RXSETSDIFILTER_01 HLR_A429_21622 WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxSetSDIFilter() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_rxSetSDIFilter() Test Closed
LLR_A429_A429_RXSETSDIFILTER_02 HLR_A429_21622 WHEN sdiValue is greater than MOD_A429_MAX_SDI_VALUE (3), the a429_rxSetSDIFilter() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:a429_rxSetSDIFilter() Test Closed
LLR_A429_A429_RXSETSDIFILTER_03 HLR_A429_21622 WHEN parameters are validated, the a429_rxSetSDIFilter() function SHALL read the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using readA429Reg(). a429.c:a429_rxSetSDIFilter() Test Closed
LLR_A429_A429_RXSETSDIFILTER_04 HLR_A429_21622 WHEN the register is read successfully, the a429_rxSetSDIFilter() function SHALL set bit 4 (SDI Enable) and configure bit 2 (SD9) and bit 3 (SD10) with the 2-bit sdiValue, then write to physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). a429.c:a429_rxSetSDIFilter() Test Closed
LLR_A429_A429_RXSETSDIFILTER_05 HLR_A429_21622 WHEN the register write completes successfully, the a429_rxSetSDIFilter() function SHALL wait for a minimum hardware SDI comparator settling delay of 1 millisecond before proceeding. a429.c:a429_rxSetSDIFilter() Test Closed
LLR_A429_A429_RXSETSDIFILTER_06 HLR_A429_21622 WHEN all operational SDI configuration completes successfully, the a429_rxSetSDIFilter() function SHALL return DRV_SUCCESS. a429.c:a429_rxSetSDIFilter() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_rxSetSDIFilter() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   rxChannelNum (Flag) l_t2->l_b2   sdiValue (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_rxSetSDIFilter() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   rxChannelNum (Payload) l_t2->l_b2   sdiValue (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_rxSetSDIFilter start Entry: a429_rxSetSDIFilter() guard_1 LLR_01: Guard Check Is `rxChannelNum` is greater than or equal to `A429_MAX_RX_CH` (7)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `sdiValue` is greater than `MOD_A429_MAX_SDI_VALUE` (3)? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step read the Receiver Control Register at physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) using `readA429Reg()` guard_2->act_3 NO (FALSE) act_4 LLR_04: Action Step set bit 4 (SDI Enable) and configure bit 2 (SD9) and bit 3 (SD10) with the 2-bit `sdiValue`, then write to physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) using `writeA429Reg()` act_3->act_4 act_5 LLR_05: Action Step invoke `timeOper_delay(TIMEOPER_MSEC, 1)` for 1-millisecond SDI comparator settling act_4->act_5 success_exit LLR_06: Final Exit return `DRV_SUCCESS` act_5->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_rxSetSDIFilter in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • rxChannelNum (const UInt8) • sdiValue (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via readA429Reg() proc_2->proc_3 Data Payload (readA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via writeA429Reg() proc_3->proc_4 Data Payload (writeA429Reg) proc_5 LLR_05: Data Payload Transformation • Process payload via () proc_4->proc_5 Data Payload () proc_6 LLR_06: Status Output Packaging • Format Return Payload: DriverStatus proc_5->proc_6 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_6->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_rxSetSDIFilter Node1 a429_rxSetSDIFilter Node1->Node1 Node2 readA429Reg Node1->Node2 Node6 writeA429Reg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
a429_rxSetSDIFilter Node1 a429_rxSetSDIFilter Node1->Node1 Node2 modA429_recvSetSDIFilter Node1->Node2 Node2->Node2

◆ a429_rxSetSpeed()

DriverStatus a429_rxSetSpeed ( const A429DevHandler a429DevHdl,
const UInt8 rxChannelNum,
const RxSpeedRate dataRate )

a429_rxSetSpeed.

Set data reception speed at the specified receiver channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]rxChannelNumReceive channel number to access.
[in]dataRateSet High Speed (0) for 100Kb/s and set Low Speed (1) for 12.5Kb/s [kbps].
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CONFIG: The configuration parameter is invalid.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_rxSetSpeed

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_RXSETSPEED_01 HLR_A429_20524 WHEN rxChannelNum is greater than or equal to A429_MAX_RX_CH (7), the a429_rxSetSpeed() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_rxSetSpeed() Test Closed
LLR_A429_A429_RXSETSPEED_02 HLR_A429_20524 WHEN rxSpeedRate is not one of RX_CH_SPEED_HIGH (0U) or RX_CH_SPEED_LOW (1U), the a429_rxSetSpeed() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:a429_rxSetSpeed() Test Closed
LLR_A429_A429_RXSETSPEED_03 HLR_A429_20524 WHEN parameters are validated, the a429_rxSetSpeed() function SHALL read the Receiver Control Register at physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using readA429Reg(). a429.c:a429_rxSetSpeed() Test Closed
LLR_A429_A429_RXSETSPEED_04 HLR_A429_20524 WHEN the register is read successfully, the a429_rxSetSpeed() function SHALL configure bit 1 (1 for 100 kbps high-speed, 0 for 12.5 kbps low-speed, MMAP_A429_TX_CR_POS_SPEED) and write the updated value to physical offset 0x0004 + (rxChannelNum * 0x04) (MMAP_A429_RX_CR_BASE) using writeA429Reg(). a429.c:a429_rxSetSpeed() Test Closed
LLR_A429_A429_RXSETSPEED_05 HLR_A429_20524 WHEN the register write completes successfully, the a429_rxSetSpeed() function SHALL wait for a minimum hardware receiver clock rate settling delay of 1 millisecond before proceeding. a429.c:a429_rxSetSpeed() Test Closed
LLR_A429_A429_RXSETSPEED_06 HLR_A429_20524 WHEN all operational speed configuration completes successfully, the a429_rxSetSpeed() function SHALL return DRV_SUCCESS. a429.c:a429_rxSetSpeed() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_rxSetSpeed() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   rxChannelNum (Flag) l_t2->l_b2   dataRate (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_rxSetSpeed() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   rxChannelNum (Payload) l_t2->l_b2   dataRate (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_rxSetSpeed start Entry: a429_rxSetSpeed() guard_1 LLR_01: Guard Check Is `rxChannelNum` is greater than or equal to `A429_MAX_RX_CH` (7)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `rxSpeedRate` is not one of `RX_CH_SPEED_HIGH (0U)` or `RX_CH_SPEED_LOW (1U)`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step read the Receiver Control Register at physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) using `readA429Reg()` guard_2->act_3 NO (FALSE) act_4 LLR_04: Action Step configure bit 1 (1 for 100 kbps high-speed, 0 for 12.5 kbps low-speed, `MMAP_A429_TX_CR_POS_SPEED`) and write the updated value to physical offset `0x0004 + (rxChannelNum * 0x04)` (`MMAP_A429_RX_CR_BASE`) using `writeA429Reg()` act_3->act_4 act_5 LLR_05: Action Step invoke `timeOper_delay(TIMEOPER_MSEC, 1)` for 1-millisecond receiver clock rate settling act_4->act_5 success_exit LLR_06: Final Exit return `DRV_SUCCESS` act_5->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_rxSetSpeed in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • rxChannelNum (const UInt8) • dataRate (const RxSpeedRate) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via readA429Reg() proc_2->proc_3 Data Payload (readA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via writeA429Reg() proc_3->proc_4 Data Payload (writeA429Reg) proc_5 LLR_05: Data Payload Transformation • Process payload via () proc_4->proc_5 Data Payload () proc_6 LLR_06: Status Output Packaging • Format Return Payload: DriverStatus proc_5->proc_6 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_6->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_rxSetSpeed Node1 a429_rxSetSpeed Node1->Node1 Node2 readA429Reg Node1->Node2 Node6 writeA429Reg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
a429_rxSetSpeed Node1 a429_rxSetSpeed Node1->Node1 Node2 modA429_recvConfig Node1->Node2 Node2->Node2

◆ a429_txDisableChannel()

DriverStatus a429_txDisableChannel ( const A429DevHandler a429DevHdl,
const UInt8 txChannelNum )

a429_txDisableChannel.

Disable the specified transmitter channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]txChannelNumTransmit channel number to access.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_txDisableChannel

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_TXDISABLECHANNEL_01 HLR_A429_287 WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txDisableChannel() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_txDisableChannel() Test Closed
LLR_A429_A429_TXDISABLECHANNEL_02 HLR_A429_287 WHEN a peripheral register transaction fails with a status other than DRV_SUCCESS, the a429_txDisableChannel() function SHALL abort processing and return that driver failure status. a429.c:a429_txDisableChannel() Test Closed
LLR_A429_A429_TXDISABLECHANNEL_03 HLR_A429_287 WHEN channel validation passes, the a429_txDisableChannel() function SHALL read the Transmitter Control Register (TX_CR) at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) from a429DevHdl.baseAddress using readA429Reg(). a429.c:a429_txDisableChannel() Test Closed
LLR_A429_A429_TXDISABLECHANNEL_04 HLR_A429_287 WHEN the register is read successfully, the a429_txDisableChannel() function SHALL clear bit 2 (Transmitter Channel Enable, MMAP_A429_TX_CR_POS_ENABLE) and write the updated control word to the Transmitter Control Register at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using writeA429Reg(). a429.c:a429_txDisableChannel() Test Closed
LLR_A429_A429_TXDISABLECHANNEL_05 HLR_A429_287 WHEN the register write completes successfully, the a429_txDisableChannel() function SHALL wait for a minimum hardware line driver deactivation settling delay of 1 millisecond before proceeding. a429.c:a429_txDisableChannel() Test Closed
LLR_A429_A429_TXDISABLECHANNEL_06 HLR_A429_287 WHEN all operational channel disablement processing completes successfully, the a429_txDisableChannel() function SHALL return DRV_SUCCESS. a429.c:a429_txDisableChannel() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_txDisableChannel() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   txChannelNum (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_txDisableChannel() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   txChannelNum (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_txDisableChannel start Entry: a429_txDisableChannel() guard_1 LLR_01: Guard Check Is `txChannelNum` is greater than or equal to `A429_MAX_TX_CH` (4)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is a peripheral register transaction fails with a status other than DRV_SUCCESS? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return the driver failure status `retStatus` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is channel validation passes? guard_2->guard_3 err_exit_3 LLR_03 Error Exit read the Transmitter Control Register (TX_CR) at physical offset `0x0084 + (txChannelNum * 0x04)` (`MMAP_A429_TX_CR_BASE`) from `a429DevHdl.baseAddress` using `readA429Reg()` guard_3->err_exit_3 YES (TRUE) act_4 LLR_04: Action Step clear bit 2 (Transmitter Channel Enable, `MMAP_A429_TX_CR_POS_ENABLE`) and write the updated control word to the Transmitter Control Register at physical offset `0x0084 + (txChannelNum * 0x04)` (`MMAP_A429_TX_CR_BASE`) using `writeA429Reg()` guard_3->act_4 NO (FALSE) act_5 LLR_05: Action Step invoke `timeOper_delay(TIMEOPER_MSEC, 1)` to execute a 1-millisecond hardware line driver deactivation settling delay act_4->act_5 success_exit LLR_06: Final Exit return `DRV_SUCCESS` act_5->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_txDisableChannel in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • txChannelNum (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via readA429Reg() proc_2->proc_3 Data Payload (readA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via writeA429Reg() proc_3->proc_4 Data Payload (writeA429Reg) proc_5 LLR_05: Data Payload Transformation • Process payload via () proc_4->proc_5 Data Payload () proc_6 LLR_06: Status Output Packaging • Format Return Payload: DriverStatus proc_5->proc_6 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_6->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_txDisableChannel Node1 a429_txDisableChannel Node1->Node1 Node2 readA429Reg Node1->Node2 Node6 writeA429Reg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
a429_txDisableChannel Node1 a429_txDisableChannel Node1->Node1 Node2 modA429_sendChDisable Node1->Node2 Node2->Node2 Node3 modA429_initReset Node2->Node3 Node3->Node3 Node4 modConfig_init Node3->Node4 Node5 modConfig_reset Node3->Node5 Node4->Node4 Node5->Node5 Node6 modConfig_close Node5->Node6 Node6->Node6

◆ a429_txDisableParity()

DriverStatus a429_txDisableParity ( const A429DevHandler a429DevHdl,
const UInt8 txChannelNum )

a429_txDisableParity.

Disable the parity at the specified transmitter channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]txChannelNumTransmit channel number to access.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_txDisableParity

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_TXDISABLEPARITY_01 HLR_A429_20384 WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txDisableParity() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_txDisableParity() Test Closed
LLR_A429_A429_TXDISABLEPARITY_02 HLR_A429_20384 WHEN channel validation passes, the a429_txDisableParity() function SHALL read the Transmitter Control Register at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using readA429Reg(). a429.c:a429_txDisableParity() Test Closed
LLR_A429_A429_TXDISABLEPARITY_03 HLR_A429_20384 WHEN the register is read successfully, the a429_txDisableParity() function SHALL clear bit 5 (Parity Enable) and write the updated 32-bit value to physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using writeA429Reg(). a429.c:a429_txDisableParity() Test Closed
LLR_A429_A429_TXDISABLEPARITY_04 HLR_A429_20384 WHEN the register write completes successfully, the a429_txDisableParity() function SHALL wait for a minimum hardware parity bypass settling delay of 1 millisecond before proceeding. a429.c:a429_txDisableParity() Test Closed
LLR_A429_A429_TXDISABLEPARITY_05 HLR_A429_20384 WHEN all operational parity disablement completes successfully, the a429_txDisableParity() function SHALL return DRV_SUCCESS. a429.c:a429_txDisableParity() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_txDisableParity() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   txChannelNum (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_txDisableParity() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   txChannelNum (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_txDisableParity start Entry: a429_txDisableParity() guard_1 LLR_01: Guard Check Is `txChannelNum` is greater than or equal to `A429_MAX_TX_CH` (4)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is channel validation passes? guard_1->guard_2 err_exit_2 LLR_02 Error Exit read the Transmitter Control Register at physical offset `0x0084 + (txChannelNum * 0x04)` (`MMAP_A429_TX_CR_BASE`) using `readA429Reg()` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step clear bit 5 (Parity Enable) and write the updated 32-bit value to physical offset `0x0084 + (txChannelNum * 0x04)` (`MMAP_A429_TX_CR_BASE`) using `writeA429Reg()` guard_2->act_3 NO (FALSE) act_4 LLR_04: Action Step invoke `timeOper_delay(TIMEOPER_MSEC, 1)` for 1-millisecond hardware parity bypass settling act_3->act_4 success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_txDisableParity in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • txChannelNum (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via readA429Reg() proc_1->proc_2 Data Payload (readA429Reg) proc_3 LLR_03: Data Payload Transformation • Process payload via writeA429Reg() proc_2->proc_3 Data Payload (writeA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via () proc_3->proc_4 Data Payload () proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_txDisableParity Node1 a429_txDisableParity Node1->Node1 Node2 readA429Reg Node1->Node2 Node6 writeA429Reg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
a429_txDisableParity Node1 a429_txDisableParity Node1->Node1 Node2 modA429_sendChDisable Node1->Node2 Node7 modA429_sendConfig Node1->Node7 Node2->Node2 Node3 modA429_initReset Node2->Node3 Node3->Node3 Node4 modConfig_init Node3->Node4 Node5 modConfig_reset Node3->Node5 Node4->Node4 Node5->Node5 Node6 modConfig_close Node5->Node6 Node6->Node6 Node7->Node7

◆ a429_txEnableChannel()

DriverStatus a429_txEnableChannel ( const A429DevHandler a429DevHdl,
const UInt8 txChannelNum )

a429_txEnableChannel.

Enable the specified transmitter channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]txChannelNumTransmit channel number to access.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_txEnableChannel

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_TXENABLECHANNEL_01 HLR_A429_287 WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txEnableChannel() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_txEnableChannel() Test Closed
LLR_A429_A429_TXENABLECHANNEL_02 HLR_A429_287 WHEN a peripheral register transaction fails with a status other than DRV_SUCCESS, the a429_txEnableChannel() function SHALL abort processing and return that driver failure status. a429.c:a429_txEnableChannel() Test Closed
LLR_A429_A429_TXENABLECHANNEL_03 HLR_A429_287 WHEN channel validation passes, the a429_txEnableChannel() function SHALL read the Transmitter Control Register (TX_CR) at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) from a429DevHdl.baseAddress using readA429Reg(). a429.c:a429_txEnableChannel() Test Closed
LLR_A429_A429_TXENABLECHANNEL_04 HLR_A429_287 WHEN the register is read successfully, the a429_txEnableChannel() function SHALL set bit 2 (Transmitter Channel Enable, MMAP_A429_TX_CR_POS_ENABLE) and write the updated control word to the Transmitter Control Register at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using writeA429Reg(). a429.c:a429_txEnableChannel() Test Closed
LLR_A429_A429_TXENABLECHANNEL_05 HLR_A429_287 WHEN the register write completes successfully, the a429_txEnableChannel() function SHALL wait for a minimum hardware line driver output settling delay of 1 millisecond before proceeding. a429.c:a429_txEnableChannel() Test Closed
LLR_A429_A429_TXENABLECHANNEL_06 HLR_A429_287 WHEN all operational channel enablement processing completes successfully, the a429_txEnableChannel() function SHALL return DRV_SUCCESS. a429.c:a429_txEnableChannel() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_txEnableChannel() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   txChannelNum (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_txEnableChannel() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   txChannelNum (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_txEnableChannel start Entry: a429_txEnableChannel() guard_1 LLR_01: Guard Check Is `txChannelNum` is greater than or equal to `A429_MAX_TX_CH` (4)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is a peripheral register transaction fails with a status other than DRV_SUCCESS? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return the driver failure status `retStatus` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is channel validation passes? guard_2->guard_3 err_exit_3 LLR_03 Error Exit read the Transmitter Control Register (TX_CR) at physical offset `0x0084 + (txChannelNum * 0x04)` (`MMAP_A429_TX_CR_BASE`) from `a429DevHdl.baseAddress` using `readA429Reg()` guard_3->err_exit_3 YES (TRUE) act_4 LLR_04: Action Step set bit 2 (Transmitter Channel Enable, `MMAP_A429_TX_CR_POS_ENABLE`) and write the updated control word to the Transmitter Control Register at physical offset `0x0084 + (txChannelNum * 0x04)` (`MMAP_A429_TX_CR_BASE`) using `writeA429Reg()` guard_3->act_4 NO (FALSE) act_5 LLR_05: Action Step invoke `timeOper_delay(TIMEOPER_MSEC, 1)` to execute a 1-millisecond hardware line driver output settling delay act_4->act_5 success_exit LLR_06: Final Exit return `DRV_SUCCESS` act_5->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_txEnableChannel in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • txChannelNum (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via readA429Reg() proc_2->proc_3 Data Payload (readA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via writeA429Reg() proc_3->proc_4 Data Payload (writeA429Reg) proc_5 LLR_05: Data Payload Transformation • Process payload via () proc_4->proc_5 Data Payload () proc_6 LLR_06: Status Output Packaging • Format Return Payload: DriverStatus proc_5->proc_6 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_6->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_txEnableChannel Node1 a429_txEnableChannel Node1->Node1 Node2 readA429Reg Node1->Node2 Node6 writeA429Reg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
a429_txEnableChannel Node1 a429_txEnableChannel Node1->Node1 Node2 modA429_sendChEnable Node1->Node2 Node2->Node2

◆ a429_txEnableParity()

DriverStatus a429_txEnableParity ( const A429DevHandler a429DevHdl,
const UInt8 txChannelNum,
const TxChParityMode parityType )

a429_txEnableParity.

Enable the parity and set parity mode at the specified transmitter channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]txChannelNumTransmit channel number to access.
[in]parityTypeSet (1) for even parity and set (0) for odd parity bit.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CONFIG: The configuration parameter is invalid.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_txEnableParity

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_TXENABLEPARITY_01 HLR_A429_20384 WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txEnableParity() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_txEnableParity() Test Closed
LLR_A429_A429_TXENABLEPARITY_02 HLR_A429_20384 WHEN txParityMode is not one of TX_CH_PARITY_ODD (0U) or TX_CH_PARITY_EVEN (1U), the a429_txEnableParity() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:a429_txEnableParity() Test Closed
LLR_A429_A429_TXENABLEPARITY_03 HLR_A429_20384 WHEN parameters are validated, the a429_txEnableParity() function SHALL read the Transmitter Control Register at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using readA429Reg(). a429.c:a429_txEnableParity() Test Closed
LLR_A429_A429_TXENABLEPARITY_04 HLR_A429_20384 WHEN the register is read successfully, the a429_txEnableParity() function SHALL set bit 5 (Parity Enable) and configure bit 4 (Parity Type: 1 for EVEN, 0 for ODD, MMAP_A429_TX_CR_POS_PARITY_TYPE), then write the updated value to physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using writeA429Reg(). a429.c:a429_txEnableParity() Test Closed
LLR_A429_A429_TXENABLEPARITY_05 HLR_A429_20384 WHEN the register write completes successfully, the a429_txEnableParity() function SHALL wait for a minimum hardware parity logic configuration settling delay of 1 millisecond before proceeding. a429.c:a429_txEnableParity() Test Closed
LLR_A429_A429_TXENABLEPARITY_06 HLR_A429_20384 WHEN all operational parity enablement completes successfully, the a429_txEnableParity() function SHALL return DRV_SUCCESS. a429.c:a429_txEnableParity() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_txEnableParity() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   txChannelNum (Flag) l_t2->l_b2   parityType (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_txEnableParity() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   txChannelNum (Payload) l_t2->l_b2   parityType (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_txEnableParity start Entry: a429_txEnableParity() guard_1 LLR_01: Guard Check Is `txChannelNum` is greater than or equal to `A429_MAX_TX_CH` (4)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `txParityMode` is not one of `TX_CH_PARITY_ODD (0U)` or `TX_CH_PARITY_EVEN (1U)`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step read the Transmitter Control Register at physical offset `0x0084 + (txChannelNum * 0x04)` (`MMAP_A429_TX_CR_BASE`) using `readA429Reg()` guard_2->act_3 NO (FALSE) act_4 LLR_04: Action Step set bit 5 (Parity Enable) and configure bit 4 (Parity Type: 1 for EVEN, 0 for ODD, `MMAP_A429_TX_CR_POS_PARITY_TYPE`), then write the updated value to physical offset `0x0084 + (txChannelNum * 0x04)` (`MMAP_A429_TX_CR_BASE`) using `writeA429Reg()` act_3->act_4 act_5 LLR_05: Action Step invoke `timeOper_delay(TIMEOPER_MSEC, 1)` for 1-millisecond hardware parity logic configuration settling act_4->act_5 success_exit LLR_06: Final Exit return `DRV_SUCCESS` act_5->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_txEnableParity in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • txChannelNum (const UInt8) • parityType (const TxChParityMode) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via readA429Reg() proc_2->proc_3 Data Payload (readA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via writeA429Reg() proc_3->proc_4 Data Payload (writeA429Reg) proc_5 LLR_05: Data Payload Transformation • Process payload via () proc_4->proc_5 Data Payload () proc_6 LLR_06: Status Output Packaging • Format Return Payload: DriverStatus proc_5->proc_6 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_6->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_txEnableParity Node1 a429_txEnableParity Node1->Node1 Node2 readA429Reg Node1->Node2 Node6 writeA429Reg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
a429_txEnableParity Node1 a429_txEnableParity Node1->Node1 Node2 modA429_sendConfig Node1->Node2 Node2->Node2

◆ a429_txFIFOMsg()

DriverStatus a429_txFIFOMsg ( const A429DevHandler a429DevHdl,
const UInt8 txChannelNum,
const UInt32 * FIFOMsgPtr,
const UInt32 msgCount )

a429_txFIFOMsg.

Transmit array of 32-bit word to the transmit FIFO at the specified transmitter channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]txChannelNumTransmit channel number to access.
[in]FIFOMsgPtrSet the FIFO Message (32-bit) to be passed (array [0-32] maximum Transmitter FIFO Buffer size).
[in]msgCountSet the value of FIFO Message to be passed.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: The module unable to read to a certain register.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.
DRV_FIFO_FULL: The FIFO is full.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_txFIFOMsg

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_TXFIFOMSG_01 HLR_A429_288 WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txFIFOMsg() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_txFIFOMsg() Test Closed
LLR_A429_A429_TXFIFOMSG_02 HLR_A429_288 WHEN txFIFOBufferPtr is NULL or msgCount is 0 or greater than A429_MAX_TX_FIFO_COUNT (32), the a429_txFIFOMsg() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:a429_txFIFOMsg() Test Closed
LLR_A429_A429_TXFIFOMSG_03 HLR_A429_288 WHEN parameters are validated, the a429_txFIFOMsg() function SHALL invoke txBus() to write the sequence of 32-bit ARINC words to the Transmitter FIFO Message Register at offset 0x02C0 + (txChannelNum * 0x08). a429.c:a429_txFIFOMsg() Test Closed
LLR_A429_A429_TXFIFOMSG_04 HLR_A429_288 WHEN operational transmission processing completes, the a429_txFIFOMsg() function SHALL return that transmission status. a429.c:a429_txFIFOMsg() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_txFIFOMsg() [Low-Level Device Drivers] Target txBus() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   txChannelNum (Flag) l_t2->l_b2   FIFOMsgPtr (Flag) l_t3->l_b3   msgCount (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_txFIFOMsg() [Low-Level Device Drivers] Target txBus() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   txChannelNum (Payload) l_t2->l_b2   FIFOMsgPtr (Payload) l_t3->l_b3   msgCount (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_txFIFOMsg start Entry: a429_txFIFOMsg() guard_1 LLR_01: Guard Check Is `txChannelNum` is greater than or equal to `A429_MAX_TX_CH` (4)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `txFIFOBufferPtr` is NULL or `msgCount` is 0 or greater than `A429_MAX_TX_FIFO_COUNT` (32)? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step invoke `txBus()` to write the sequence of 32-bit ARINC words to the Transmitter FIFO Message Register at offset `0x02C0 + (txChannelNum * 0x08)` guard_2->act_3 NO (FALSE) success_exit LLR_04: Final Exit return the transmission status `retStatus` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_txFIFOMsg in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • txChannelNum (const UInt8) • FIFOMsgPtr (const UInt32) • msgCount (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via txBus() proc_2->proc_3 Data Payload (txBus) proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_txFIFOMsg Node1 a429_txFIFOMsg Node1->Node1 Node2 txBus Node1->Node2 Node2->Node2 Node3 readA429Reg Node2->Node3 Node7 writeA429Reg Node2->Node7 Node3->Node3 Node4 interDrv_Read32 Node3->Node4 Node4->Node4 Node5 interDrv_isAddressValid Node4->Node5 Node6 memoryMap_Read32 Node4->Node6 Node5->Node5 Node6->Node6 Node7->Node7 Node8 interDrv_Write32 Node7->Node8 Node8->Node5 Node8->Node8 Node9 memoryMap_Write32 Node8->Node9 Node9->Node9
Here is the caller graph for this function:
a429_txFIFOMsg Node1 a429_txFIFOMsg Node1->Node1 Node2 modA429_send Node1->Node2 Node2->Node2

◆ a429_txGetState()

DriverStatus a429_txGetState ( const A429DevHandler a429DevHdl,
const UInt8 txChannelNum,
ChStatus * txStatusPtr )

a429_txGetState

Get the operation status of the transmitter channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]txChannelNumTransmit channel number to access.
[out]txStatusPtrStatus of transmitter channel operational state.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_txGetState

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_TXGETSTATE_01 HLR_A429_288 WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txGetState() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_txGetState() Test Closed
LLR_A429_A429_TXGETSTATE_02 HLR_A429_288 WHEN txChStatePtr is NULL, the a429_txGetState() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:a429_txGetState() Test Closed
LLR_A429_A429_TXGETSTATE_03 HLR_A429_288 WHEN parameters are validated, the a429_txGetState() function SHALL read the Transmitter Control Register (TX_CR) at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using readA429Reg(). a429.c:a429_txGetState() Test Closed
LLR_A429_A429_TXGETSTATE_04 HLR_A429_288 WHEN the register is read successfully, the a429_txGetState() function SHALL evaluate bit 2 (Transmitter Enable) and assign CH_ENABLED if bit 2 is asserted or CH_DISABLED if bit 2 is cleared. a429.c:a429_txGetState() Test Closed
LLR_A429_A429_TXGETSTATE_05 HLR_A429_288 WHEN all state acquisition completes successfully, the a429_txGetState() function SHALL return DRV_SUCCESS. a429.c:a429_txGetState() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_txGetState() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   txChannelNum (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_txGetState() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   txChannelNum (Payload) r_b0->r_t0   *txStatusPtr (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_txGetState start Entry: a429_txGetState() guard_1 LLR_01: Guard Check Is `txChannelNum` is greater than or equal to `A429_MAX_TX_CH` (4)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `txChStatePtr` is NULL? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step read the Transmitter Control Register (TX_CR) at physical offset `0x0084 + (txChannelNum * 0x04)` (`MMAP_A429_TX_CR_BASE`) using `readA429Reg()` guard_2->act_3 NO (FALSE) act_4 LLR_04: Action Step evaluate bit 2 (Transmitter Enable) and assign `CH_ENABLED` if bit 2 is asserted or `CH_DISABLED` if bit 2 is cleared act_3->act_4 success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_txGetState in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • txChannelNum (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via readA429Reg() proc_2->proc_3 Data Payload (readA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via () proc_3->proc_4 Data Payload () proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • txStatusPtr (ChStatus) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_txGetState Node1 a429_txGetState Node1->Node1 Node2 readA429Reg Node1->Node2 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
a429_txGetState Node1 a429_txGetState Node1->Node1 Node2 modA429_send Node1->Node2 Node2->Node2

◆ a429_txSetSpeed()

DriverStatus a429_txSetSpeed ( const A429DevHandler a429DevHdl,
const UInt8 txChannelNum,
const TxSpeedRate dataRate )

a429_txSetSpeed.

Set the data transmission speed at the specified transmitter channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]txChannelNumTransmit channel number to access.
[in]dataRateSet High Speed (0) for 100Kb/s and set Low Speed (1) for 12.5Kb/s [kbps].
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_CONFIG: The configuration set is invalid.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: a429_txSetSpeed

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_A429_TXSETSPEED_01 HLR_A429_20383 WHEN txChannelNum is greater than or equal to A429_MAX_TX_CH (4), the a429_txSetSpeed() function SHALL abort processing and return DRV_INVALID_CHANNEL. a429.c:a429_txSetSpeed() Test Closed
LLR_A429_A429_TXSETSPEED_02 HLR_A429_20383 WHEN txSpeedRate is not one of TX_CH_SPEED_HIGH (0U) or TX_CH_SPEED_LOW (1U), the a429_txSetSpeed() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:a429_txSetSpeed() Test Closed
LLR_A429_A429_TXSETSPEED_03 HLR_A429_20383 WHEN parameters are validated, the a429_txSetSpeed() function SHALL read the Transmitter Control Register at physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using readA429Reg(). a429.c:a429_txSetSpeed() Test Closed
LLR_A429_A429_TXSETSPEED_04 HLR_A429_20383 WHEN the register is read successfully, the a429_txSetSpeed() function SHALL configure bit 1 (1 for 100 kbps high-speed, 0 for 12.5 kbps low-speed, MMAP_A429_TX_CR_POS_SPEED) and write the updated value to physical offset 0x0084 + (txChannelNum * 0x04) (MMAP_A429_TX_CR_BASE) using writeA429Reg(). a429.c:a429_txSetSpeed() Test Closed
LLR_A429_A429_TXSETSPEED_05 HLR_A429_20383 WHEN the register write completes successfully, the a429_txSetSpeed() function SHALL wait for a minimum hardware baud clock generator settling delay of 1 millisecond before proceeding. a429.c:a429_txSetSpeed() Test Closed
LLR_A429_A429_TXSETSPEED_06 HLR_A429_20383 WHEN all operational speed configuration completes successfully, the a429_txSetSpeed() function SHALL return DRV_SUCCESS. a429.c:a429_txSetSpeed() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller a429_txSetSpeed() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   txChannelNum (Flag) l_t2->l_b2   dataRate (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller a429_txSetSpeed() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   txChannelNum (Payload) l_t2->l_b2   dataRate (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_a429_txSetSpeed start Entry: a429_txSetSpeed() guard_1 LLR_01: Guard Check Is `txChannelNum` is greater than or equal to `A429_MAX_TX_CH` (4)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `txSpeedRate` is not one of `TX_CH_SPEED_HIGH (0U)` or `TX_CH_SPEED_LOW (1U)`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step read the Transmitter Control Register at physical offset `0x0084 + (txChannelNum * 0x04)` (`MMAP_A429_TX_CR_BASE`) using `readA429Reg()` guard_2->act_3 NO (FALSE) act_4 LLR_04: Action Step configure bit 1 (1 for 100 kbps high-speed, 0 for 12.5 kbps low-speed, `MMAP_A429_TX_CR_POS_SPEED`) and write the updated value to physical offset `0x0084 + (txChannelNum * 0x04)` (`MMAP_A429_TX_CR_BASE`) using `writeA429Reg()` act_3->act_4 act_5 LLR_05: Action Step invoke `timeOper_delay(TIMEOPER_MSEC, 1)` for 1-millisecond baud clock generator settling act_4->act_5 success_exit LLR_06: Final Exit return `DRV_SUCCESS` act_5->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_a429_txSetSpeed in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • txChannelNum (const UInt8) • dataRate (const TxSpeedRate) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via readA429Reg() proc_2->proc_3 Data Payload (readA429Reg) proc_4 LLR_04: Data Payload Transformation • Process payload via writeA429Reg() proc_3->proc_4 Data Payload (writeA429Reg) proc_5 LLR_05: Data Payload Transformation • Process payload via () proc_4->proc_5 Data Payload () proc_6 LLR_06: Status Output Packaging • Format Return Payload: DriverStatus proc_5->proc_6 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_6->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
a429_txSetSpeed Node1 a429_txSetSpeed Node1->Node1 Node2 readA429Reg Node1->Node2 Node6 writeA429Reg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
a429_txSetSpeed Node1 a429_txSetSpeed Node1->Node1 Node2 modA429_sendConfig Node1->Node2 Node2->Node2

◆ configLabelFilter()

DriverStatus configLabelFilter ( const A429DevHandler a429DevHdl,
const UInt8 rxChannelNum,
const UInt32 address,
const UInt32 * filterDataPtr )
static

configLabelFilter.

Filter the message with specified label at the specified receiver channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]rxChannelNumReceive channel number to access.
[in]addressRegister address to access.
[in]filterDataPtrSet an array of labels to filter.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: configLabelFilter

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_CONFIGLABELFILTER_01 HLR_A429_288 WHEN filterDataPtr is NULL, the configLabelFilter() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:configLabelFilter() Test Closed
LLR_A429_CONFIGLABELFILTER_02 HLR_A429_288 WHEN pointer validation passes, the configLabelFilter() function SHALL assert bit 5 (0x20) in the Receiver Flag Register at offset 0x0044 + (rxChannelNum * 0x04) to enable hardware label acceptance filtering. a429.c:configLabelFilter() Test Closed
LLR_A429_CONFIGLABELFILTER_03 HLR_A429_288 WHEN label filtering is enabled, the configLabelFilter() function SHALL write each 32-bit filter segment word to the Label Filter Table at offset 0x00C4 + (rxChannelNum * 0x20) + (segment * 0x04) using writeA429Reg(). a429.c:configLabelFilter() Test Closed
LLR_A429_CONFIGLABELFILTER_04 HLR_A429_288 WHEN all 8 filter segments are programmed successfully, the configLabelFilter() function SHALL return DRV_SUCCESS. a429.c:configLabelFilter() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller configLabelFilter() [Low-Level Device Drivers] Target writeA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   rxChannelNum (Flag) l_t2->l_b2   address (Flag) l_t3->l_b3   filterDataPtr (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller configLabelFilter() [Low-Level Device Drivers] Target writeA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   rxChannelNum (Payload) l_t2->l_b2   address (Payload) l_t3->l_b3   filterDataPtr (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_configLabelFilter start Entry: configLabelFilter() guard_1 LLR_01: Guard Check Is `filterDataPtr` is NULL? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is pointer validation passes? guard_1->guard_2 err_exit_2 LLR_02 Error Exit assert bit 5 (`0x20`) in the Receiver Flag Register at offset `0x0044 + (rxChannelNum * 0x04)` to enable hardware label acceptance filtering guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step write each 32-bit filter segment word to the Label Filter Table at offset `0x00C4 + (rxChannelNum * 0x20) + (segment * 0x04)` using `writeA429Reg()` guard_2->act_3 NO (FALSE) success_exit LLR_04: Final Exit return `DRV_SUCCESS` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_configLabelFilter in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • rxChannelNum (const UInt8) • address (const UInt32) • filterDataPtr (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via () proc_1->proc_2 Data Payload () proc_3 LLR_03: Data Payload Transformation • Process payload via writeA429Reg() proc_2->proc_3 Data Payload (writeA429Reg) proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
configLabelFilter Node1 configLabelFilter Node1->Node1 Node2 writeA429Reg Node1->Node2 Node2->Node2 Node3 interDrv_Write32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Write32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
configLabelFilter Node1 configLabelFilter Node1->Node1 Node2 a429_rxClearLabelFilter Node1->Node2 Node8 a429_rxSetLabelFilter Node1->Node8 Node2->Node2 Node3 modA429_recvChDisable Node2->Node3 Node3->Node3 Node4 modA429_initReset Node3->Node4 Node4->Node4 Node5 modConfig_init Node4->Node5 Node6 modConfig_reset Node4->Node6 Node5->Node5 Node6->Node6 Node7 modConfig_close Node6->Node7 Node7->Node7 Node8->Node8 Node9 modA429_recvSetLabelFilter Node8->Node9 Node9->Node9

◆ parityCheck()

MsgParityType parityCheck ( const UInt32 arincMsg)
static

parityCheck.

Parity checking for received ARINC message.

Parameters
[in]arincMsg32-bit ARINC message.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
MSG_PARITY_ODD: Message has an odd number of ones.
MSG_PARITY_EVEN: Message has an even number of ones.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: parityCheck

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_PARITYCHECK_01 HLR_A429_288 WHEN preconditions are satisfied, the parityCheck() function SHALL compute iterative bitwise XOR fold across bits [31:0] using shift increments of 16, 8, 4, 2, and 1 bits. a429.c:parityCheck() Test Closed
LLR_A429_PARITYCHECK_02 HLR_A429_288 WHEN the folded LSB bit 0 is equal to 0, the parityCheck() function SHALL return MSG_PARITY_EVEN (0U). a429.c:parityCheck() Test Closed
LLR_A429_PARITYCHECK_03 HLR_A429_288 WHEN the folded LSB bit 0 is equal to 1, the parityCheck() function SHALL return MSG_PARITY_ODD (1U). a429.c:parityCheck() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller parityCheck() [Low-Level Device Drivers] Target interDrv_Write32() / MMIO [Hardware Abstraction Layer] Caller:s->Target:n l_t0->l_b0   arincMsg (Flag) r_b0->r_t0   statusCode (MsgParityType)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller parityCheck() [Low-Level Device Drivers] Target interDrv_Write32() / MMIO [Hardware Abstraction Layer] Caller:s->Target:n l_t0->l_b0   arincMsg (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_parityCheck start Entry: parityCheck() act_1 LLR_01: Action Step compute iterative bitwise XOR fold across bits [31:0] using shift increments of 16, 8, 4, 2, and 1 bits start->act_1 guard_2 LLR_02: Guard Check Is the folded LSB bit 0 is equal to 0? act_1->guard_2 err_exit_2 LLR_02 Error Exit return `MSG_PARITY_EVEN (0U)` guard_2->err_exit_2 YES (TRUE) success_exit LLR_03: Final Exit return `MSG_PARITY_ODD (1U)` guard_2->success_exit NO (FALSE)
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_parityCheck in_store Input Data Sources & Parameters • arincMsg (const UInt32) proc_1 LLR_01: Data Mutation & Processing • Transformed Entity: in_store->proc_1 Transformed Data () proc_2 LLR_02: Status Output Packaging • Format Return Payload: MsgParityType proc_1->proc_2 Final Output Data proc_3 LLR_03: Status Output Packaging • Format Return Payload: MsgParityType proc_2->proc_3 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (MsgParityType) proc_3->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
parityCheck Node1 parityCheck Node1->Node1
Here is the caller graph for this function:
parityCheck Node1 parityCheck Node1->Node1 Node2 a429_rxGetFIFOMsgs Node1->Node2 Node2->Node2 Node3 modA429_recvFIFO Node2->Node3 Node3->Node3

◆ readA429Reg()

DriverStatus readA429Reg ( const UInt32 baseAddress,
const UInt32 addrOffset,
UInt32 * data )
static

readA429Reg.

ARINC429 PCIe read function.

Parameters
[in]baseAddressThe base address of the module and device.
[in]offsetThe offset address from module base address.
[out]data32bit data to read from PCIe.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: PCIe failed to read value.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: readA429Reg

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_READA429REG_01 HLR_A429_288 WHEN the destination pointer data is NULL, the readA429Reg() function SHALL abort processing and return DRV_INVALID_PARAM. a429.c:readA429Reg() Test Closed
LLR_A429_READA429REG_02 HLR_A429_288 WHEN the PCIe MMIO 32-bit transaction fails with status other than INTF_SUCCESS, the readA429Reg() function SHALL abort processing and return DRV_READ_FAILED. a429.c:readA429Reg() Test Closed
LLR_A429_READA429REG_03 HLR_A429_288 WHEN preconditions are satisfied, the readA429Reg() function SHALL invoke PCIe primitive interDrv_Read32() to read 32-bit word from physical memory address baseAddress + addrOffset into *data. a429.c:readA429Reg() Test Closed
LLR_A429_READA429REG_04 HLR_A429_288 WHEN PCIe MMIO read completes successfully, the readA429Reg() function SHALL return DRV_SUCCESS. a429.c:readA429Reg() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller readA429Reg() [Low-Level Device Drivers] Target interDrv_Read32() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Flag) l_t1->l_b1   addrOffset (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller readA429Reg() [Low-Level Device Drivers] Target interDrv_Read32() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Payload) l_t1->l_b1   addrOffset (Payload) r_b0->r_t0   *data (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_readA429Reg start Entry: readA429Reg() guard_1 LLR_01: Guard Check Is the destination pointer `data` is NULL? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is the PCIe MMIO 32-bit transaction fails with status other than INTF_SUCCESS? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_READ_FAILED` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step invoke PCIe primitive `interDrv_Read32()` to read 32-bit word from physical memory address `baseAddress + addrOffset` into `*data` guard_2->act_3 NO (FALSE) success_exit LLR_04: Final Exit return `DRV_SUCCESS` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_readA429Reg in_store Input Data Sources & Parameters • baseAddress (const UInt32) • addrOffset (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via interDrv_Read32() proc_2->proc_3 Data Payload (interDrv_Read32) proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • data (UInt32) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
readA429Reg Node1 readA429Reg Node1->Node1 Node2 interDrv_Read32 Node1->Node2 Node2->Node2 Node3 interDrv_isAddressValid Node2->Node3 Node4 memoryMap_Read32 Node2->Node4 Node3->Node3 Node4->Node4
Here is the caller graph for this function:
readA429Reg Node1 readA429Reg Node1->Node1 Node2 a429_getCbit Node1->Node2 Node4 a429_getPbit Node1->Node4 Node6 a429_getTemp Node1->Node6 Node7 a429_rxDisableChannel Node1->Node7 Node13 a429_rxDisableParity Node1->Node13 Node14 a429_rxEnableParity Node1->Node14 Node16 a429_rxDisableSDIFilter Node1->Node16 Node17 a429_rxEnableChannel Node1->Node17 Node19 a429_rxGetState Node1->Node19 Node21 a429_rxSetSDIFilter Node1->Node21 Node23 a429_rxSetSpeed Node1->Node23 Node24 a429_txDisableChannel Node1->Node24 Node26 a429_txDisableParity Node1->Node26 Node28 a429_txEnableChannel Node1->Node28 Node30 a429_txEnableParity Node1->Node30 Node31 a429_txGetState Node1->Node31 Node33 a429_txSetSpeed Node1->Node33 Node34 readFIFOMsgs Node1->Node34 Node36 txBus Node1->Node36 Node2->Node2 Node3 modHsb_getA429Cbit Node2->Node3 Node3->Node3 Node4->Node4 Node5 modHsb_getA429Pbit Node4->Node5 Node5->Node5 Node6->Node3 Node6->Node6 Node7->Node7 Node8 modA429_recvChDisable Node7->Node8 Node8->Node8 Node9 modA429_initReset Node8->Node9 Node9->Node9 Node10 modConfig_init Node9->Node10 Node11 modConfig_reset Node9->Node11 Node10->Node10 Node11->Node11 Node12 modConfig_close Node11->Node12 Node12->Node12 Node13->Node8 Node13->Node13 Node13->Node14 Node15 modA429_recvConfig Node13->Node15 Node14->Node14 Node14->Node15 Node15->Node15 Node16->Node8 Node16->Node16 Node17->Node17 Node18 modA429_recvChEnable Node17->Node18 Node18->Node18 Node19->Node19 Node20 modA429_recvFIFO Node19->Node20 Node20->Node20 Node21->Node21 Node22 modA429_recvSetSDIFilter Node21->Node22 Node22->Node22 Node23->Node15 Node23->Node23 Node24->Node24 Node25 modA429_sendChDisable Node24->Node25 Node25->Node9 Node25->Node25 Node26->Node25 Node26->Node26 Node27 modA429_sendConfig Node26->Node27 Node27->Node27 Node28->Node28 Node29 modA429_sendChEnable Node28->Node29 Node29->Node29 Node30->Node27 Node30->Node30 Node31->Node31 Node32 modA429_send Node31->Node32 Node32->Node32 Node33->Node27 Node33->Node33 Node34->Node34 Node35 a429_rxGetFIFOMsgs Node34->Node35 Node35->Node20 Node35->Node35 Node36->Node36 Node37 a429_txFIFOMsg Node36->Node37 Node37->Node32 Node37->Node37

◆ readFIFOMsgs()

DriverStatus readFIFOMsgs ( const A429DevHandler a429DevHdl,
const UInt8 rxChannelNum,
UInt32 * recvMsgPtr,
UInt32 * msgCount )
static

readFIFOMsgs.

Retrieve the messages in receive FIFO and FIFO count at the specified receiver Channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]rxChannelNumReceive channel number to access.
[out]recvMsgPtrAn array of unread 32-bit Arinc messages in FIFO.
[out]msgCountTotal unread messages in FIFO.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: The module unable to read to a certain register.
DRV_INVALID_PARAM: The provided address pointer is invalid.
DRV_INVALID_VALUE: The value is invalid.
DRV_FIFO_EMPTY: The FIFO is empty.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: readFIFOMsgs

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_READFIFOMSGS_01 HLR_A429_288 WHEN preconditions are satisfied, the readFIFOMsgs() function SHALL read the Receiver FIFO Count Register at physical offset 0x023C + (rxChannelNum * 0x08) using readA429Reg() to determine pending message count. a429.c:readFIFOMsgs() Test Closed
LLR_A429_READFIFOMSGS_02 HLR_A429_288 WHEN pending message count is greater than 0, the readFIFOMsgs() function SHALL read successive 32-bit words from the Receiver FIFO Message Register at physical offset 0x0240 + (rxChannelNum * 0x08) using readA429Reg(). a429.c:readFIFOMsgs() Test Closed
LLR_A429_READFIFOMSGS_03 HLR_A429_288 WHEN all available words are drained from FIFO, the readFIFOMsgs() function SHALL store message count in *msgCount and return DRV_SUCCESS. a429.c:readFIFOMsgs() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller readFIFOMsgs() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   rxChannelNum (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller readFIFOMsgs() [Low-Level Device Drivers] Target readA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   rxChannelNum (Payload) r_b0->r_t0   *recvMsgPtr (Output Data) r_b1->r_t1   *msgCount (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_readFIFOMsgs start Entry: readFIFOMsgs() act_1 LLR_01: Action Step read the Receiver FIFO Count Register at physical offset `0x023C + (rxChannelNum * 0x08)` using `readA429Reg()` to determine pending message count start->act_1 act_2 LLR_02: Action Step read successive 32-bit words from the Receiver FIFO Message Register at physical offset `0x0240 + (rxChannelNum * 0x08)` using `readA429Reg()` act_1->act_2 success_exit LLR_03: Final Exit store message count in `*msgCount` and return `DRV_SUCCESS` act_2->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_readFIFOMsgs in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • rxChannelNum (const UInt8) proc_1 LLR_01: Data Payload Transformation • Process payload via readA429Reg() in_store->proc_1 Data Payload (readA429Reg) proc_2 LLR_02: Data Payload Transformation • Process payload via readA429Reg() proc_1->proc_2 Data Payload (readA429Reg) proc_3 LLR_03: Status Output Packaging • Format Return Payload: DriverStatus proc_2->proc_3 Final Output Data out_sink Output Data Sinks & Status Return • recvMsgPtr (UInt32) • msgCount (UInt32) proc_3->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
readFIFOMsgs Node1 readFIFOMsgs Node1->Node1 Node2 readA429Reg Node1->Node2 Node6 writeA429Reg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
readFIFOMsgs Node1 readFIFOMsgs Node1->Node1 Node2 a429_rxGetFIFOMsgs Node1->Node2 Node2->Node2 Node3 modA429_recvFIFO Node2->Node3 Node3->Node3

◆ txBus()

DriverStatus txBus ( const A429DevHandler a429DevHdl,
const UInt8 txChannelNum,
const UInt32 * txFIFOBufferPtr,
const UInt32 msgCount )
static

txBus.

Send 32-bit word to the transmit FIFO at the specified transmitter channel.

Parameters
[in]a429DevHdlThe ARINC429 device handler.
[in]txChannelNumTransmit channel number to access.
[in]txFIFOBufferPtrSet the FIFO Message (32-bit) to be passed.
[in]msgCountSet the value of FIFO Message to be passed.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_READ_FAILED: The module unable to read to a certain register.
DRV_INVALID_PARAM: The provided address pointer is invalid.
DRV_FIFO_FULL: The FIFO is full.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: txBus

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_TXBUS_01 HLR_A429_288 WHEN preconditions are satisfied, the txBus() function SHALL poll the Transmitter Flag Register at physical offset 0x00A4 + (txChannelNum * 0x04) to ensure FIFO not full (bit 2 is 0). a429.c:txBus() Test Closed
LLR_A429_TXBUS_02 HLR_A429_288 WHEN transmitter FIFO has available capacity, the txBus() function SHALL write each 32-bit ARINC word to the Transmitter FIFO Message Register at physical offset 0x02C0 + (txChannelNum * 0x08) using writeA429Reg(). a429.c:txBus() Test Closed
LLR_A429_TXBUS_03 HLR_A429_288 WHEN all words are loaded into transmitter FIFO, the txBus() function SHALL return DRV_SUCCESS. a429.c:txBus() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller txBus() [Low-Level Device Drivers] Target writeA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Flag) l_t1->l_b1   txChannelNum (Flag) l_t2->l_b2   txFIFOBufferPtr (Flag) l_t3->l_b3   msgCount (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller txBus() [Low-Level Device Drivers] Target writeA429Reg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   a429DevHdl (Payload) l_t1->l_b1   txChannelNum (Payload) l_t2->l_b2   txFIFOBufferPtr (Payload) l_t3->l_b3   msgCount (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_txBus start Entry: txBus() act_1 LLR_01: Action Step poll the Transmitter Flag Register at physical offset `0x00A4 + (txChannelNum * 0x04)` to ensure FIFO not full (bit 2 is 0) start->act_1 act_2 LLR_02: Action Step write each 32-bit ARINC word to the Transmitter FIFO Message Register at physical offset `0x02C0 + (txChannelNum * 0x08)` using `writeA429Reg()` act_1->act_2 success_exit LLR_03: Final Exit return `DRV_SUCCESS` act_2->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_txBus in_store Input Data Sources & Parameters • a429DevHdl (const A429DevHandler) • txChannelNum (const UInt8) • txFIFOBufferPtr (const UInt32) • msgCount (const UInt32) proc_1 LLR_01: Data Payload Transformation • Process payload via () in_store->proc_1 Data Payload () proc_2 LLR_02: Data Payload Transformation • Process payload via writeA429Reg() proc_1->proc_2 Data Payload (writeA429Reg) proc_3 LLR_03: Status Output Packaging • Format Return Payload: DriverStatus proc_2->proc_3 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_3->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
txBus Node1 txBus Node1->Node1 Node2 readA429Reg Node1->Node2 Node6 writeA429Reg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
txBus Node1 txBus Node1->Node1 Node2 a429_txFIFOMsg Node1->Node2 Node2->Node2 Node3 modA429_send Node2->Node3 Node3->Node3

◆ writeA429Reg()

DriverStatus writeA429Reg ( const UInt32 baseAddress,
const UInt32 addrOffset,
const UInt32 data )
static

writeA429Reg.

ARINC429 PCIe write function.

Parameters
[in]baseAddressThe base address of the module and device.
[in]offsetThe offset address from module base address.
[out]data32bit data to write to PCIe.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: PCIe failed to write value.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: writeA429Reg

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_A429_WRITEA429REG_01 HLR_A429_288 WHEN the PCIe MMIO 32-bit transaction fails with status other than INTF_SUCCESS, the writeA429Reg() function SHALL abort processing and return DRV_WRITE_FAILED. a429.c:writeA429Reg() Test Closed
LLR_A429_WRITEA429REG_02 HLR_A429_288 WHEN preconditions are satisfied, the writeA429Reg() function SHALL invoke PCIe primitive interDrv_Write32() to write 32-bit payload data to physical memory address baseAddress + addrOffset. a429.c:writeA429Reg() Test Closed
LLR_A429_WRITEA429REG_03 HLR_A429_288 WHEN PCIe MMIO write completes successfully, the writeA429Reg() function SHALL return DRV_SUCCESS. a429.c:writeA429Reg() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller writeA429Reg() [Low-Level Device Drivers] Target interDrv_Write32() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Flag) l_t1->l_b1   addrOffset (Flag) l_t2->l_b2   data (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller writeA429Reg() [Low-Level Device Drivers] Target interDrv_Write32() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Payload) l_t1->l_b1   addrOffset (Payload) l_t2->l_b2   data (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_writeA429Reg start Entry: writeA429Reg() guard_1 LLR_01: Guard Check Is the PCIe MMIO 32-bit transaction fails with status other than INTF_SUCCESS? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_WRITE_FAILED` guard_1->err_exit_1 YES (TRUE) act_2 LLR_02: Action Step invoke PCIe primitive `interDrv_Write32()` to write 32-bit payload `data` to physical memory address `baseAddress + addrOffset` guard_1->act_2 NO (FALSE) success_exit LLR_03: Final Exit return `DRV_SUCCESS` act_2->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_writeA429Reg in_store Input Data Sources & Parameters • baseAddress (const UInt32) • addrOffset (const UInt32) • data (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via interDrv_Write32() proc_1->proc_2 Data Payload (interDrv_Write32) proc_3 LLR_03: Status Output Packaging • Format Return Payload: DriverStatus proc_2->proc_3 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_3->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
writeA429Reg Node1 writeA429Reg Node1->Node1 Node2 interDrv_Write32 Node1->Node2 Node2->Node2 Node3 interDrv_isAddressValid Node2->Node3 Node4 memoryMap_Write32 Node2->Node4 Node3->Node3 Node4->Node4
Here is the caller graph for this function:
writeA429Reg Node1 writeA429Reg Node1->Node1 Node2 a429_configMCR Node1->Node2 Node7 a429_reset Node1->Node7 Node8 a429_rxDisableChannel Node1->Node8 Node10 a429_rxDisableParity Node1->Node10 Node11 a429_rxEnableParity Node1->Node11 Node13 a429_rxDisableSDIFilter Node1->Node13 Node14 a429_rxEnableChannel Node1->Node14 Node16 a429_rxSetSDIFilter Node1->Node16 Node18 a429_rxSetSpeed Node1->Node18 Node19 a429_txDisableChannel Node1->Node19 Node21 a429_txDisableParity Node1->Node21 Node23 a429_txEnableChannel Node1->Node23 Node25 a429_txEnableParity Node1->Node25 Node26 a429_txSetSpeed Node1->Node26 Node27 configLabelFilter Node1->Node27 Node31 readFIFOMsgs Node1->Node31 Node34 txBus Node1->Node34 Node2->Node2 Node3 modA429_initReset Node2->Node3 Node3->Node3 Node4 modConfig_init Node3->Node4 Node5 modConfig_reset Node3->Node5 Node4->Node4 Node5->Node5 Node6 modConfig_close Node5->Node6 Node6->Node6 Node7->Node3 Node7->Node7 Node8->Node8 Node9 modA429_recvChDisable Node8->Node9 Node9->Node3 Node9->Node9 Node10->Node9 Node10->Node10 Node10->Node11 Node12 modA429_recvConfig Node10->Node12 Node11->Node11 Node11->Node12 Node12->Node12 Node13->Node9 Node13->Node13 Node14->Node14 Node15 modA429_recvChEnable Node14->Node15 Node15->Node15 Node16->Node16 Node17 modA429_recvSetSDIFilter Node16->Node17 Node17->Node17 Node18->Node12 Node18->Node18 Node19->Node19 Node20 modA429_sendChDisable Node19->Node20 Node20->Node3 Node20->Node20 Node21->Node20 Node21->Node21 Node22 modA429_sendConfig Node21->Node22 Node22->Node22 Node23->Node23 Node24 modA429_sendChEnable Node23->Node24 Node24->Node24 Node25->Node22 Node25->Node25 Node26->Node22 Node26->Node26 Node27->Node27 Node28 a429_rxClearLabelFilter Node27->Node28 Node29 a429_rxSetLabelFilter Node27->Node29 Node28->Node9 Node28->Node28 Node29->Node29 Node30 modA429_recvSetLabelFilter Node29->Node30 Node30->Node30 Node31->Node31 Node32 a429_rxGetFIFOMsgs Node31->Node32 Node32->Node32 Node33 modA429_recvFIFO Node32->Node33 Node33->Node33 Node34->Node34 Node35 a429_txFIFOMsg Node34->Node35 Node35->Node35 Node36 modA429_send Node35->Node36 Node36->Node36

Variable Documentation

◆ rxParityStatus

RxChParityMode rxParityStatus[16]
static
Initial value:
= {
RX_CH_PARITY_DISABLE, RX_CH_PARITY_DISABLE, RX_CH_PARITY_DISABLE, RX_CH_PARITY_DISABLE,
RX_CH_PARITY_DISABLE, RX_CH_PARITY_DISABLE, RX_CH_PARITY_DISABLE, RX_CH_PARITY_DISABLE,
RX_CH_PARITY_DISABLE, RX_CH_PARITY_DISABLE, RX_CH_PARITY_DISABLE, RX_CH_PARITY_DISABLE,
RX_CH_PARITY_DISABLE, RX_CH_PARITY_DISABLE, RX_CH_PARITY_DISABLE, RX_CH_PARITY_DISABLE
}
RX_CH_PARITY_DISABLE
@ RX_CH_PARITY_DISABLE
Receiver Message Parity is Disable.
Definition a429.h:78