mmapAnalogIn.h File Reference

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Macros
#define	MMAP_ADC_OFFSET   (0x3000U)
#define	MMAP_ADC_CH_OFFSET_GAP   (0x0004U)
#define	MMAP_ADC_IN_RG_BANK_BASE   (0x0000U)
#define	MMAP_ADC_IN_RG_BANK0   (0x0000U)
#define	MMAP_ADC_IN_RG_BANK1   (0x0004U)
#define	MMAP_ADC_SAMPLING_RATE   (0x0008U)
#define	MMAP_ADC_CH_ENABLE   (0x000CU)
#define	MMAP_ADC_CH_STATE   (0x0100U)
#define	MMAP_ADC_PBIT_GEN_STATUS   (0x0104U)
#define	MMAP_ADC_PBIT_OVP_STATUS   (0x0108U)
#define	MMAP_ADC_PBIT_IVR_ERR_STATUS   (0x010CU)
#define	MMAP_ADC_CBIT_GEN_STATUS   (0x0110U)
#define	MMAP_ADC_CBIT_OVP_STATUS   (0x0114U)
#define	MMAP_ADC_CBIT_IVR_ERR_STATUS   (0x0118U)
#define	MMAP_ADC_TEMP_5V   (0x011CU)
#define	MMAP_ADC_TEMP_10V   (0x0120U)
#define	MMAP_ADC_RD_BASE_ADDR   (0x0200U)
#define	MMAP_ADC_POS_PBIT_INCOMPLETED   (0U)
#define	MMAP_ADC_POS_PBIT_F_3V3   (8U)
#define	MMAP_ADC_POS_PBIT_F_5V   (9U)
#define	MMAP_ADC_POS_PBIT_F_15V   (10U)
#define	MMAP_ADC_POS_PBIT_UT_BANK0   (11U)
#define	MMAP_ADC_POS_PBIT_OT_BANK0   (12U)
#define	MMAP_ADC_POS_PBIT_UT_BANK1   (13U)
#define	MMAP_ADC_POS_PBIT_OT_BANK1   (14U)
#define	MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH1   (16U)
#define	MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH2   (17U)
#define	MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH3   (18U)
#define	MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH4   (19U)
#define	MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH5   (20U)
#define	MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH6   (21U)
#define	MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH7   (22U)
#define	MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH8   (23U)
#define	MMAP_ADC_POS_PBIT_IC_COMM_ERR_LB_BANK0   (24U)
#define	MMAP_ADC_POS_PBIT_IC_COMM_ERR_LB_BANK1   (25U)
#define	MMAP_ADC_POS_PBIT_OVP_CH1   (0U)
#define	MMAP_ADC_POS_PBIT_OVP_CH2   (1U)
#define	MMAP_ADC_POS_PBIT_OVP_CH3   (2U)
#define	MMAP_ADC_POS_PBIT_OVP_CH4   (3U)
#define	MMAP_ADC_POS_PBIT_OVP_CH5   (4U)
#define	MMAP_ADC_POS_PBIT_OVP_CH6   (5U)
#define	MMAP_ADC_POS_PBIT_OVP_CH7   (6U)
#define	MMAP_ADC_POS_PBIT_OVP_CH8   (7U)
#define	MMAP_ADC_POS_PBIT_IVR_ERR_CH1   (0U)
#define	MMAP_ADC_POS_PBIT_IVR_ERR_CH2   (1U)
#define	MMAP_ADC_POS_PBIT_IVR_ERR_CH3   (2U)
#define	MMAP_ADC_POS_PBIT_IVR_ERR_CH4   (3U)
#define	MMAP_ADC_POS_PBIT_IVR_ERR_CH5   (4U)
#define	MMAP_ADC_POS_PBIT_IVR_ERR_CH6   (5U)
#define	MMAP_ADC_POS_PBIT_IVR_ERR_CH7   (6U)
#define	MMAP_ADC_POS_PBIT_IVR_ERR_CH8   (7U)
#define	MMAP_ADC_POS_PBIT_CARD_OPEN_FAIL   (34U)
#define	MMAP_ADC_POS_PBIT_MOD_INIT_FAIL   (35U)
#define	MMAP_ADC_POS_PBIT_FAIL   (36U)
#define	MMAP_ADC_POS_CBIT_NOT_RUN   (0U)
#define	MMAP_ADC_POS_CBIT_F_3V3   (8U)
#define	MMAP_ADC_POS_CBIT_F_5V5   (9U)
#define	MMAP_ADC_POS_CBIT_F_15V   (10U)
#define	MMAP_ADC_POS_CBIT_UT_BANK0   (11U)
#define	MMAP_ADC_POS_CBIT_OT_BANK0   (12U)
#define	MMAP_ADC_POS_CBIT_UT_BANK1   (13U)
#define	MMAP_ADC_POS_CBIT_OT_BANK1   (14U)
#define	MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH1   (16U)
#define	MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH2   (17U)
#define	MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH3   (18U)
#define	MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH4   (19U)
#define	MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH5   (20U)
#define	MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH6   (21U)
#define	MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH7   (22U)
#define	MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH8   (23U)
#define	MMAP_ADC_POS_CBIT_IC_COMM_ERR_LB_BANK0   (24U)
#define	MMAP_ADC_POS_CBIT_IC_COMM_ERR_LB_BANK1   (25U)
#define	MMAP_ADC_POS_CBIT_OVP_CH1   (0U)
#define	MMAP_ADC_POS_CBIT_OVP_CH2   (1U)
#define	MMAP_ADC_POS_CBIT_OVP_CH3   (2U)
#define	MMAP_ADC_POS_CBIT_OVP_CH4   (3U)
#define	MMAP_ADC_POS_CBIT_OVP_CH5   (4U)
#define	MMAP_ADC_POS_CBIT_OVP_CH6   (5U)
#define	MMAP_ADC_POS_CBIT_OVP_CH7   (6U)
#define	MMAP_ADC_POS_CBIT_OVP_CH8   (7U)
#define	MMAP_ADC_POS_CBIT_IVR_ERR_CH1   (0U)
#define	MMAP_ADC_POS_CBIT_IVR_ERR_CH2   (1U)
#define	MMAP_ADC_POS_CBIT_IVR_ERR_CH3   (2U)
#define	MMAP_ADC_POS_CBIT_IVR_ERR_CH4   (3U)
#define	MMAP_ADC_POS_CBIT_IVR_ERR_CH5   (4U)
#define	MMAP_ADC_POS_CBIT_IVR_ERR_CH6   (5U)
#define	MMAP_ADC_POS_CBIT_IVR_ERR_CH7   (6U)
#define	MMAP_ADC_POS_CBIT_IVR_ERR_CH8   (7U)
#define	MMAP_ADC_POS_CBIT_CARD_OPEN_FAIL   (34U)
#define	MMAP_ADC_POS_CBIT_MOD_INIT_FAIL   (35U)
#define	MMAP_ADC_POS_CBIT_FAIL   (36U)
#define	MMAP_ADC_TEMP_LSB   (0.005F)
#define	MMAP_ADC_POS_CH_NUM   (1U)

Detailed Description

Author

Ramza Anuar ramza.nosp@m..anu.nosp@m.ar@tu.nosp@m.sas..nosp@m.my

Memory Map for Analog Input

Macro Definition Documentation

MMAP_ADC_CBIT_GEN_STATUS

#define MMAP_ADC_CBIT_GEN_STATUS   (0x0110U)

MMAP_ADC_CBIT_IVR_ERR_STATUS

#define MMAP_ADC_CBIT_IVR_ERR_STATUS   (0x0118U)

MMAP_ADC_CBIT_OVP_STATUS

#define MMAP_ADC_CBIT_OVP_STATUS   (0x0114U)

MMAP_ADC_CH_ENABLE

#define MMAP_ADC_CH_ENABLE   (0x000CU)

MMAP_ADC_CH_OFFSET_GAP

#define MMAP_ADC_CH_OFFSET_GAP   (0x0004U)

MMAP_ADC_CH_STATE

#define MMAP_ADC_CH_STATE   (0x0100U)

MMAP_ADC_IN_RG_BANK0

#define MMAP_ADC_IN_RG_BANK0   (0x0000U)

MMAP_ADC_IN_RG_BANK1

#define MMAP_ADC_IN_RG_BANK1   (0x0004U)

MMAP_ADC_IN_RG_BANK_BASE

#define MMAP_ADC_IN_RG_BANK_BASE   (0x0000U)

MMAP_ADC_OFFSET

#define MMAP_ADC_OFFSET   (0x3000U)

MMAP_ADC_PBIT_GEN_STATUS

#define MMAP_ADC_PBIT_GEN_STATUS   (0x0104U)

MMAP_ADC_PBIT_IVR_ERR_STATUS

#define MMAP_ADC_PBIT_IVR_ERR_STATUS   (0x010CU)

MMAP_ADC_PBIT_OVP_STATUS

#define MMAP_ADC_PBIT_OVP_STATUS   (0x0108U)

MMAP_ADC_POS_CBIT_CARD_OPEN_FAIL

#define MMAP_ADC_POS_CBIT_CARD_OPEN_FAIL   (34U)

MMAP_ADC_POS_CBIT_F_15V

#define MMAP_ADC_POS_CBIT_F_15V   (10U)

MMAP_ADC_POS_CBIT_F_3V3

#define MMAP_ADC_POS_CBIT_F_3V3   (8U)

MMAP_ADC_POS_CBIT_F_5V5

#define MMAP_ADC_POS_CBIT_F_5V5   (9U)

MMAP_ADC_POS_CBIT_FAIL

#define MMAP_ADC_POS_CBIT_FAIL   (36U)

MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH1

#define MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH1   (16U)

MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH2

#define MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH2   (17U)

MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH3

#define MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH3   (18U)

MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH4

#define MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH4   (19U)

MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH5

#define MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH5   (20U)

MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH6

#define MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH6   (21U)

MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH7

#define MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH7   (22U)

MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH8

#define MMAP_ADC_POS_CBIT_IC_COMM_ERR_CH8   (23U)

MMAP_ADC_POS_CBIT_IC_COMM_ERR_LB_BANK0

#define MMAP_ADC_POS_CBIT_IC_COMM_ERR_LB_BANK0   (24U)

MMAP_ADC_POS_CBIT_IC_COMM_ERR_LB_BANK1

#define MMAP_ADC_POS_CBIT_IC_COMM_ERR_LB_BANK1   (25U)

MMAP_ADC_POS_CBIT_IVR_ERR_CH1

#define MMAP_ADC_POS_CBIT_IVR_ERR_CH1   (0U)

MMAP_ADC_POS_CBIT_IVR_ERR_CH2

#define MMAP_ADC_POS_CBIT_IVR_ERR_CH2   (1U)

MMAP_ADC_POS_CBIT_IVR_ERR_CH3

#define MMAP_ADC_POS_CBIT_IVR_ERR_CH3   (2U)

MMAP_ADC_POS_CBIT_IVR_ERR_CH4

#define MMAP_ADC_POS_CBIT_IVR_ERR_CH4   (3U)

MMAP_ADC_POS_CBIT_IVR_ERR_CH5

#define MMAP_ADC_POS_CBIT_IVR_ERR_CH5   (4U)

MMAP_ADC_POS_CBIT_IVR_ERR_CH6

#define MMAP_ADC_POS_CBIT_IVR_ERR_CH6   (5U)

MMAP_ADC_POS_CBIT_IVR_ERR_CH7

#define MMAP_ADC_POS_CBIT_IVR_ERR_CH7   (6U)

MMAP_ADC_POS_CBIT_IVR_ERR_CH8

#define MMAP_ADC_POS_CBIT_IVR_ERR_CH8   (7U)

MMAP_ADC_POS_CBIT_MOD_INIT_FAIL

#define MMAP_ADC_POS_CBIT_MOD_INIT_FAIL   (35U)

MMAP_ADC_POS_CBIT_NOT_RUN

#define MMAP_ADC_POS_CBIT_NOT_RUN   (0U)

MMAP_ADC_POS_CBIT_OT_BANK0

#define MMAP_ADC_POS_CBIT_OT_BANK0   (12U)

MMAP_ADC_POS_CBIT_OT_BANK1

#define MMAP_ADC_POS_CBIT_OT_BANK1   (14U)

MMAP_ADC_POS_CBIT_OVP_CH1

#define MMAP_ADC_POS_CBIT_OVP_CH1   (0U)

MMAP_ADC_POS_CBIT_OVP_CH2

#define MMAP_ADC_POS_CBIT_OVP_CH2   (1U)

MMAP_ADC_POS_CBIT_OVP_CH3

#define MMAP_ADC_POS_CBIT_OVP_CH3   (2U)

MMAP_ADC_POS_CBIT_OVP_CH4

#define MMAP_ADC_POS_CBIT_OVP_CH4   (3U)

MMAP_ADC_POS_CBIT_OVP_CH5

#define MMAP_ADC_POS_CBIT_OVP_CH5   (4U)

MMAP_ADC_POS_CBIT_OVP_CH6

#define MMAP_ADC_POS_CBIT_OVP_CH6   (5U)

MMAP_ADC_POS_CBIT_OVP_CH7

#define MMAP_ADC_POS_CBIT_OVP_CH7   (6U)

MMAP_ADC_POS_CBIT_OVP_CH8

#define MMAP_ADC_POS_CBIT_OVP_CH8   (7U)

MMAP_ADC_POS_CBIT_UT_BANK0

#define MMAP_ADC_POS_CBIT_UT_BANK0   (11U)

MMAP_ADC_POS_CBIT_UT_BANK1

#define MMAP_ADC_POS_CBIT_UT_BANK1   (13U)

MMAP_ADC_POS_CH_NUM

#define MMAP_ADC_POS_CH_NUM   (1U)

MMAP_ADC_POS_PBIT_CARD_OPEN_FAIL

#define MMAP_ADC_POS_PBIT_CARD_OPEN_FAIL   (34U)

MMAP_ADC_POS_PBIT_F_15V

#define MMAP_ADC_POS_PBIT_F_15V   (10U)

MMAP_ADC_POS_PBIT_F_3V3

#define MMAP_ADC_POS_PBIT_F_3V3   (8U)

MMAP_ADC_POS_PBIT_F_5V

#define MMAP_ADC_POS_PBIT_F_5V   (9U)

MMAP_ADC_POS_PBIT_FAIL

#define MMAP_ADC_POS_PBIT_FAIL   (36U)

MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH1

#define MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH1   (16U)

MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH2

#define MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH2   (17U)

MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH3

#define MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH3   (18U)

MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH4

#define MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH4   (19U)

MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH5

#define MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH5   (20U)

MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH6

#define MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH6   (21U)

MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH7

#define MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH7   (22U)

MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH8

#define MMAP_ADC_POS_PBIT_IC_COMM_ERR_CH8   (23U)

MMAP_ADC_POS_PBIT_IC_COMM_ERR_LB_BANK0

#define MMAP_ADC_POS_PBIT_IC_COMM_ERR_LB_BANK0   (24U)

MMAP_ADC_POS_PBIT_IC_COMM_ERR_LB_BANK1

#define MMAP_ADC_POS_PBIT_IC_COMM_ERR_LB_BANK1   (25U)

MMAP_ADC_POS_PBIT_INCOMPLETED

#define MMAP_ADC_POS_PBIT_INCOMPLETED   (0U)

MMAP_ADC_POS_PBIT_IVR_ERR_CH1

#define MMAP_ADC_POS_PBIT_IVR_ERR_CH1   (0U)

MMAP_ADC_POS_PBIT_IVR_ERR_CH2

#define MMAP_ADC_POS_PBIT_IVR_ERR_CH2   (1U)

MMAP_ADC_POS_PBIT_IVR_ERR_CH3

#define MMAP_ADC_POS_PBIT_IVR_ERR_CH3   (2U)

MMAP_ADC_POS_PBIT_IVR_ERR_CH4

#define MMAP_ADC_POS_PBIT_IVR_ERR_CH4   (3U)

MMAP_ADC_POS_PBIT_IVR_ERR_CH5

#define MMAP_ADC_POS_PBIT_IVR_ERR_CH5   (4U)

MMAP_ADC_POS_PBIT_IVR_ERR_CH6

#define MMAP_ADC_POS_PBIT_IVR_ERR_CH6   (5U)

MMAP_ADC_POS_PBIT_IVR_ERR_CH7

#define MMAP_ADC_POS_PBIT_IVR_ERR_CH7   (6U)

MMAP_ADC_POS_PBIT_IVR_ERR_CH8

#define MMAP_ADC_POS_PBIT_IVR_ERR_CH8   (7U)

MMAP_ADC_POS_PBIT_MOD_INIT_FAIL

#define MMAP_ADC_POS_PBIT_MOD_INIT_FAIL   (35U)

MMAP_ADC_POS_PBIT_OT_BANK0

#define MMAP_ADC_POS_PBIT_OT_BANK0   (12U)

MMAP_ADC_POS_PBIT_OT_BANK1

#define MMAP_ADC_POS_PBIT_OT_BANK1   (14U)

MMAP_ADC_POS_PBIT_OVP_CH1

#define MMAP_ADC_POS_PBIT_OVP_CH1   (0U)

MMAP_ADC_POS_PBIT_OVP_CH2

#define MMAP_ADC_POS_PBIT_OVP_CH2   (1U)

MMAP_ADC_POS_PBIT_OVP_CH3

#define MMAP_ADC_POS_PBIT_OVP_CH3   (2U)

MMAP_ADC_POS_PBIT_OVP_CH4

#define MMAP_ADC_POS_PBIT_OVP_CH4   (3U)

MMAP_ADC_POS_PBIT_OVP_CH5

#define MMAP_ADC_POS_PBIT_OVP_CH5   (4U)

MMAP_ADC_POS_PBIT_OVP_CH6

#define MMAP_ADC_POS_PBIT_OVP_CH6   (5U)

MMAP_ADC_POS_PBIT_OVP_CH7

#define MMAP_ADC_POS_PBIT_OVP_CH7   (6U)

MMAP_ADC_POS_PBIT_OVP_CH8

#define MMAP_ADC_POS_PBIT_OVP_CH8   (7U)

MMAP_ADC_POS_PBIT_UT_BANK0

#define MMAP_ADC_POS_PBIT_UT_BANK0   (11U)

MMAP_ADC_POS_PBIT_UT_BANK1

#define MMAP_ADC_POS_PBIT_UT_BANK1   (13U)

MMAP_ADC_RD_BASE_ADDR

#define MMAP_ADC_RD_BASE_ADDR   (0x0200U)

MMAP_ADC_SAMPLING_RATE

#define MMAP_ADC_SAMPLING_RATE   (0x0008U)

MMAP_ADC_TEMP_10V

#define MMAP_ADC_TEMP_10V   (0x0120U)

MMAP_ADC_TEMP_5V

#define MMAP_ADC_TEMP_5V   (0x011CU)

MMAP_ADC_TEMP_LSB

#define MMAP_ADC_TEMP_LSB   (0.005F)