HFCC-01 Low-Level Software (LLSW) Rel_6802_HFCC-01-RP-CSAR-CB
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core.c File Reference
#include "core.h"
#include "gpioIODevice.h"
#include "gpioIODeviceDrv.h"
#include "nvsram.h"
#include "coreNvsramMap.h"
#include "utilHelper.h"
#include "mmapCore.h"
#include <string.h>
Include dependency graph for core.c:
core.c Node1 core.c Node2 core.h Node1->Node2 Node7 gpioIODevice.h Node1->Node7 Node8 gpioIODeviceDrv.h Node1->Node8 Node9 nvsram.h Node1->Node9 Node10 coreNvsramMap.h Node1->Node10 Node11 utilHelper.h Node1->Node11 Node13 mmapCore.h Node1->Node13 Node14 string.h Node1->Node14 Node3 commonDataTypes.h Node2->Node3 Node4 driverStatus.h Node2->Node4 Node5 interDrv.h Node2->Node5 Node5->Node3 Node6 interStatus.h Node5->Node6 Node10->Node9 Node12 INTEGRITY.h Node11->Node12

Macros

#define CORE_PLAT_GPIO_2   (11U)
#define CORE_PLAT_GPIO_3   (12U)
#define CORE_PLAT_GPIO_5   (14U)
#define CORE_PLAT_GPIO_6   (17U)
#define CORE_PLAT_GPIO_11   (15U)
#define CORE_MFB1_READY_IO   (CORE_PLAT_GPIO_2)
#define CORE_MFB2_READY_IO   (CORE_PLAT_GPIO_3)
#define CORE_LED_RED   (CORE_PLAT_GPIO_5)
#define CORE_LED_GREEN   (CORE_PLAT_GPIO_6)
#define CORE_POWER_FAIL   (CORE_PLAT_GPIO_11)

Functions

static DriverStatus readCoreReg (const UInt32 baseAddress, const UInt32 offset, UInt32 *data)
 readCoreReg - Core PCIe read function.
static DriverStatus writeCoreReg (const UInt32 baseAddress, const UInt32 offset, const UInt32 data)
 writeCoreReg - Core PCIe write function.
DriverStatus core_register (const void *gpIODev4, const void *nvsramMR)
 core_register.
DriverStatus core_mfbIoInit (void)
 core_mfbIoInit.
DriverStatus core_getMfbReadyStatus (const UInt8 mfbIndex, MfbReadyStatus *mfbStatusPtr)
 core_getMfbReadyStatus.
DriverStatus core_statusLEDInit (void)
 core_statusLEDInit.
DriverStatus core_statusLEDSet (const UInt32 color)
 core_statusLEDSet.
DriverStatus core_statusPwrFailInit (void)
 core_statusPwrFailInit.
DriverStatus core_statusPwrFailGet (PowerFailState *pwrFailStatusPtr)
 core_statusPwrFailGet.
DriverStatus core_cardInfo (const UInt32 baseAddr, CardDetails *cardDetailsPtr)
 core_cardInfo.
DriverStatus core_cardStatus (const UInt32 baseAddr, CardStatus *cardStatusPtr)
 core_cardStatus.
DriverStatus core_nvsramRead32 (void *const buff, const UInt32 offset)
 core_nvsramRead32.
DriverStatus core_nvsramWrite32 (void const *buff, const UInt32 offset)
 core_nvsramWrite32.
DriverStatus core_getMemoryRegion (RegionInfo *region)
 core_getMemoryRegion.
DriverStatus core_enableDisableHeartbeat (const UInt32 baseAddress, const Bool state)
 core_enableDisableHeartbeat.
DriverStatus core_getHeartbeatResolution (const UInt32 baseAddress, UInt32 *resolution)
 core_getHeartbeatResolution.
DriverStatus core_setHeartbeatTimeoutCount (const UInt32 baseAddress, const UInt32 count)
 core_setHeartbeatTimeoutCount.
DriverStatus core_getHeartbeatElapsedCount (const UInt32 baseAddress, UInt32 *count)
 core_getHeartbeatElapsedCount.
DriverStatus core_feedHeartbeat (const UInt32 baseAddress, const UInt32 feedingValue)
 core_feedHeartbeat.

Variables

static RegionInfo pciDeviceNvsram = { 0 }
static void * ioDevSBCGpioDev4 = 0
static UInt32 nvsramID = (0xFFU)
static Bool coreInit = FALSE
static Bool mfbIoInit = FALSE
static Bool gpioLEDInit = FALSE
static Bool gpioPwrFailInit = FALSE

Detailed Description

Author
Qamaruddin Yunus qamar.nosp@m.uddi.nosp@m.n.yun.nosp@m.us@t.nosp@m.usas..nosp@m.my, Mohammad Nasrulhadi Abdullah nasru.nosp@m.lhad.nosp@m.i.abd.nosp@m.ulla.nosp@m.h@tus.nosp@m.as.m.nosp@m.y, Ramza Anuar ramza.nosp@m..anu.nosp@m.ar@tu.nosp@m.sas..nosp@m.my

Core File

Macro Definition Documentation

◆ CORE_LED_GREEN

#define CORE_LED_GREEN   (CORE_PLAT_GPIO_6)

◆ CORE_LED_RED

#define CORE_LED_RED   (CORE_PLAT_GPIO_5)

◆ CORE_MFB1_READY_IO

#define CORE_MFB1_READY_IO   (CORE_PLAT_GPIO_2)

◆ CORE_MFB2_READY_IO

#define CORE_MFB2_READY_IO   (CORE_PLAT_GPIO_3)

◆ CORE_PLAT_GPIO_11

#define CORE_PLAT_GPIO_11   (15U)

◆ CORE_PLAT_GPIO_2

#define CORE_PLAT_GPIO_2   (11U)

◆ CORE_PLAT_GPIO_3

#define CORE_PLAT_GPIO_3   (12U)

◆ CORE_PLAT_GPIO_5

#define CORE_PLAT_GPIO_5   (14U)

◆ CORE_PLAT_GPIO_6

#define CORE_PLAT_GPIO_6   (17U)

◆ CORE_POWER_FAIL

#define CORE_POWER_FAIL   (CORE_PLAT_GPIO_11)

Function Documentation

◆ core_cardInfo()

DriverStatus core_cardInfo ( const UInt32 baseAddr,
CardDetails * cardDetailsPtr )

core_cardInfo.

Retrieves information about a specific card.

Parameters
[in]baseAddrThe base address of the card to query.
[out]cardDetailsPtrPointer to a CardDetails structure to store the retrieved card information.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation it returns DRV_SUCCESS.
Return values
DRV_SUCCESS: Success.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_cardInfo

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_CARDINFO_01 HLR_IO_31356 WHEN the pointer cardDetailsPtr is NULL (invalid), the core_cardInfo() function SHALL abort processing and return DRV_INVALID_PARAM. core.c:core_cardInfo() Test Closed
LLR_CORE_CORE_CARDINFO_02 HLR_IO_31356 WHEN reading any card information register via interDrv_Read32() fails with a status other than INTF_SUCCESS, the core_cardInfo() function SHALL abort processing and return DRV_READ_FAILED. core.c:core_cardInfo() Test Closed
LLR_CORE_CORE_CARDINFO_03 HLR_IO_31356 WHEN preconditions are satisfied, the core_cardInfo() function SHALL invoke routine interDrv_Read32() to execute target subsystem hardware operation. core.c:core_cardInfo() Test Closed
LLR_CORE_CORE_CARDINFO_04 HLR_IO_31356 WHEN preconditions are satisfied, the core_cardInfo() function SHALL invoke routine memcpy() to execute target subsystem hardware operation. core.c:core_cardInfo() Test Closed
LLR_CORE_CORE_CARDINFO_05 HLR_IO_31356 WHEN all operational processing completes successfully, the core_cardInfo() function SHALL return DRV_SUCCESS. core.c:core_cardInfo() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_cardInfo() [Low-Level Device Drivers] Target interDrv_Read32() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddr (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_cardInfo() [Low-Level Device Drivers] Target interDrv_Read32() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddr (Payload) r_b0->r_t0   *cardDetailsPtr (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_cardInfo start Entry: core_cardInfo() guard_1 LLR_01: Guard Check Is the pointer `cardDetailsPtr` is NULL (invalid)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `interStatus` is not equal to `INTF_SUCCESS`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_READ_FAILED` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step invoke routine `interDrv_Read32()` to execute target subsystem hardware operation guard_2->act_3 NO (FALSE) act_4 LLR_04: Action Step invoke routine `memcpy()` to execute target subsystem hardware operation act_3->act_4 success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_cardInfo in_store Input Data Sources & Parameters • baseAddr (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: cardDetailsPtr in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: interStatus proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via interDrv_Read32() proc_2->proc_3 Data Payload (interDrv_Read32) proc_4 LLR_04: Data Payload Transformation • Process payload via memcpy() proc_3->proc_4 Data Payload (memcpy) proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • cardDetailsPtr (CardDetails) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_cardInfo Node1 core_cardInfo Node1->Node1 Node2 interDrv_Read32 Node1->Node2 Node2->Node2 Node3 interDrv_isAddressValid Node2->Node3 Node4 memoryMap_Read32 Node2->Node4 Node3->Node3 Node4->Node4
Here is the caller graph for this function:
core_cardInfo Node1 core_cardInfo Node1->Node1 Node2 modConfig_open Node1->Node2 Node3 modInfo_getBrdInfo Node1->Node3 Node2->Node2 Node3->Node3

◆ core_cardStatus()

DriverStatus core_cardStatus ( const UInt32 baseAddr,
CardStatus * cardStatusPtr )

core_cardStatus.

Retrieves the status of a specific card.

Parameters
[in]baseAddrThe base address of the card to query.
[out]cardStatusPtrPointer to a CardStatus structure to store the retrieved card status.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation it returns DRV_SUCCESS.
Return values
DRV_SUCCESS: Success.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_cardStatus

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_CARDSTATUS_01 HLR_IO_38196 WHEN the destination card status pointer is NULL, the core_cardStatus() function SHALL abort processing and return DRV_INVALID_PARAM. core.c:core_cardStatus() Test Closed
LLR_CORE_CORE_CARDSTATUS_02 HLR_IO_38196 WHEN an internal register 32-bit read transaction fails with a status other than INTF_SUCCESS, the core_cardStatus() function SHALL abort processing and return DRV_READ_FAILED. core.c:core_cardStatus() Test Closed
LLR_CORE_CORE_CARDSTATUS_03 HLR_IO_38196 WHEN preconditions are satisfied, the core_cardStatus() function SHALL read the FPGA status register (MMAP_CORE_FPGA_STATUS) and populate both the PBIT and CBIT status fields (pbitStatus, cbitStatus). core.c:core_cardStatus() Test Closed
LLR_CORE_CORE_CARDSTATUS_04 HLR_IO_38196 WHEN the sign bit (bit 11, MMAP_CORE_BRD_TEMP_12_BIT - 1) of the 12-bit board temperature reading is set (1), the core_cardStatus() function SHALL sign-extend the reading by bitwise OR-ing with 0xF000 before assigning to coreTemp. core.c:core_cardStatus() Test Closed
LLR_CORE_CORE_CARDSTATUS_05 HLR_IO_38196 WHEN preconditions are satisfied, the core_cardStatus() function SHALL read and convert DRAM, FPGA, eFuse, and DC-DC temperatures by scaling each 16-bit masked word with MMAP_CORE_TEMP_LSB. core.c:core_cardStatus() Test Closed
LLR_CORE_CORE_CARDSTATUS_06 HLR_IO_38196 WHEN all telemetry acquisition completes successfully, the core_cardStatus() function SHALL return DRV_SUCCESS. core.c:core_cardStatus() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_cardStatus() [Low-Level Device Drivers] Target interDrv_Read32() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddr (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_cardStatus() [Low-Level Device Drivers] Target interDrv_Read32() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddr (Payload) r_b0->r_t0   *cardStatusPtr (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_cardStatus start Entry: core_cardStatus() guard_1 LLR_01: Guard Check Is the pointer `cardStatusPtr` is NULL (invalid)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `interStatus` is not equal to `INTF_SUCCESS`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_READ_FAILED` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is READ_BIT(temp12Bit, (MMAP_CORE_BRD_TEMP_12_BIT - 1))? guard_2->guard_3 err_exit_3 LLR_03 Error Exit execute conditional operational branch guard_3->err_exit_3 YES (TRUE) act_4 LLR_04: Action Step invoke routine `interDrv_Read32()` to execute target subsystem hardware operation guard_3->act_4 NO (FALSE) success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_cardStatus in_store Input Data Sources & Parameters • baseAddr (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: cardStatusPtr in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: interStatus proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: READ_BIT proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Payload Transformation • Process payload via interDrv_Read32() proc_3->proc_4 Data Payload (interDrv_Read32) proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • cardStatusPtr (CardStatus) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_cardStatus Node1 core_cardStatus Node1->Node1 Node2 interDrv_Read32 Node1->Node2 Node2->Node2 Node3 interDrv_isAddressValid Node2->Node3 Node4 memoryMap_Read32 Node2->Node4 Node3->Node3 Node4->Node4
Here is the caller graph for this function:
core_cardStatus Node1 core_cardStatus Node1->Node1 Node2 modHsb_getMfbCbit Node1->Node2 Node3 modHsb_getMfbPbit Node1->Node3 Node2->Node2 Node3->Node3

◆ core_enableDisableHeartbeat()

DriverStatus core_enableDisableHeartbeat ( const UInt32 baseAddress,
const Bool state )

core_enableDisableHeartbeat.

Enable or disable the heartbeat.

Parameters
[in]baseAddressThe base address of the card to query.
[in]stateThe state to set for the heartbeat (TRUE to enable, FALSE to disable).
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_enableDisableHeartbeat

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_ENABLEDISABLEHEARTBEAT_01 HLR_HBT_43820 WHEN the enablement state parameter is equal to TRUE, the core_enableDisableHeartbeat() function SHALL write enable command word MMAP_CORE_HBT_ENABLE (0xEEEEEEEE) to the heartbeat enable/disable register (MMAP_CORE_HBT_EN_DIS, offset 0x01B0) using writeCoreReg(). core.c:core_enableDisableHeartbeat() Test Closed
LLR_CORE_CORE_ENABLEDISABLEHEARTBEAT_02 HLR_HBT_43820 WHEN the enablement state parameter is equal to FALSE, the core_enableDisableHeartbeat() function SHALL write the heartbeat control command word to the heartbeat enable/disable register (MMAP_CORE_HBT_EN_DIS, offset 0x01B0) using writeCoreReg(). core.c:core_enableDisableHeartbeat() Test Closed
LLR_CORE_CORE_ENABLEDISABLEHEARTBEAT_03 HLR_HBT_43820 WHEN the register write transaction reports a failure status other than DRV_SUCCESS, the core_enableDisableHeartbeat() function SHALL abort processing and return that driver failure status. core.c:core_enableDisableHeartbeat() Test Closed
LLR_CORE_CORE_ENABLEDISABLEHEARTBEAT_04 HLR_HBT_43820 WHEN the heartbeat register configuration write completes successfully, the core_enableDisableHeartbeat() function SHALL return DRV_SUCCESS. core.c:core_enableDisableHeartbeat() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_enableDisableHeartbeat() [Low-Level Device Drivers] Target writeCoreReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Flag) l_t1->l_b1   state (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_enableDisableHeartbeat() [Low-Level Device Drivers] Target writeCoreReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Payload) l_t1->l_b1   state (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_enableDisableHeartbeat start Entry: core_enableDisableHeartbeat() guard_1 LLR_01: Guard Check Is `TRUE` is equal to `state`? start->guard_1 err_exit_1 LLR_01 Error Exit execute conditional operational branch guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is a driver operation reports a failure status other than DRV_SUCCESS? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `retStatus` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step write the Heartbeat Mechanism Based Address (CORE_HBT_EN_DIS) at physical offset `0x01B0` (`MMAP_CORE_HBT_EN_DIS`) using `writeCoreReg()` guard_2->act_3 NO (FALSE) success_exit LLR_04: Final Exit return `DRV_SUCCESS` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_enableDisableHeartbeat in_store Input Data Sources & Parameters • baseAddress (const UInt32) • state (const Bool) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: state in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: retStatus proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via writeCoreReg() proc_2->proc_3 Data Payload (writeCoreReg) proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_enableDisableHeartbeat Node1 core_enableDisableHeartbeat Node1->Node1 Node2 writeCoreReg Node1->Node2 Node2->Node2 Node3 interDrv_Write32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Write32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
core_enableDisableHeartbeat Node1 core_enableDisableHeartbeat Node1->Node1 Node2 modHeartbeat_disableHeartbeat Node1->Node2 Node4 modHeartbeat_enableHeartbeat Node1->Node4 Node2->Node2 Node3 modConfig_close Node2->Node3 Node3->Node3 Node4->Node4

◆ core_feedHeartbeat()

DriverStatus core_feedHeartbeat ( const UInt32 baseAddress,
const UInt32 feedingValue )

core_feedHeartbeat.

Feed the heartbeat to prevent timeout.

Parameters
[in]baseAddressThe base address of the card to query.
[in]feedingValueThe value to feed to the heartbeat.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_feedHeartbeat

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_FEEDHEARTBEAT_01 HLR_HBT_43823 WHEN a driver operation reports a failure status other than DRV_SUCCESS, the core_feedHeartbeat() function SHALL abort processing and return that driver failure status. core.c:core_feedHeartbeat() Test Closed
LLR_CORE_CORE_FEEDHEARTBEAT_02 HLR_HBT_43823 WHEN preconditions are satisfied, the core_feedHeartbeat() function SHALL write the Heartbeat Mechanism Based Address (CORE_HBT_FEEDING) at physical offset 0x01C0 (MMAP_CORE_HBT_FEEDING) using writeCoreReg(). core.c:core_feedHeartbeat() Test Closed
LLR_CORE_CORE_FEEDHEARTBEAT_03 HLR_HBT_43823 WHEN all operational processing completes successfully, the core_feedHeartbeat() function SHALL return DRV_SUCCESS. core.c:core_feedHeartbeat() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_feedHeartbeat() [Low-Level Device Drivers] Target writeCoreReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Flag) l_t1->l_b1   feedingValue (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_feedHeartbeat() [Low-Level Device Drivers] Target writeCoreReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Payload) l_t1->l_b1   feedingValue (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_feedHeartbeat start Entry: core_feedHeartbeat() guard_1 LLR_01: Guard Check Is a driver operation reports a failure status other than DRV_SUCCESS? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `retStatus` guard_1->err_exit_1 YES (TRUE) act_2 LLR_02: Action Step write the Heartbeat Mechanism Based Address (CORE_HBT_FEEDING) at physical offset `0x01C0` (`MMAP_CORE_HBT_FEEDING`) using `writeCoreReg()` guard_1->act_2 NO (FALSE) success_exit LLR_03: Final Exit return `DRV_SUCCESS` act_2->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_feedHeartbeat in_store Input Data Sources & Parameters • baseAddress (const UInt32) • feedingValue (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: retStatus in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via writeCoreReg() proc_1->proc_2 Data Payload (writeCoreReg) proc_3 LLR_03: Status Output Packaging • Format Return Payload: DriverStatus proc_2->proc_3 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_3->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_feedHeartbeat Node1 core_feedHeartbeat Node1->Node1 Node2 writeCoreReg Node1->Node2 Node2->Node2 Node3 interDrv_Write32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Write32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
core_feedHeartbeat Node1 core_feedHeartbeat Node1->Node1 Node2 modHeartbeat_feedHeartbeat Node1->Node2 Node2->Node2

◆ core_getHeartbeatElapsedCount()

DriverStatus core_getHeartbeatElapsedCount ( const UInt32 baseAddress,
UInt32 * count )

core_getHeartbeatElapsedCount.

Get the elapsed heartbeat count.

Parameters
[in]baseAddressThe base address of the card to query.
[out]countPointer to a variable to store the retrieved heartbeat elapsed count.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_getHeartbeatElapsedCount

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_GETHEARTBEATELAPSEDCOUNT_01 HLR_HBT_43822 WHEN the pointer count is NULL (invalid), the core_getHeartbeatElapsedCount() function SHALL abort processing and return DRV_INVALID_PARAM. core.c:core_getHeartbeatElapsedCount() Test Closed
LLR_CORE_CORE_GETHEARTBEATELAPSEDCOUNT_02 HLR_HBT_43822 WHEN a driver operation reports a failure status other than DRV_SUCCESS, the core_getHeartbeatElapsedCount() function SHALL abort processing and return that driver failure status. core.c:core_getHeartbeatElapsedCount() Test Closed
LLR_CORE_CORE_GETHEARTBEATELAPSEDCOUNT_03 HLR_HBT_43822 WHEN preconditions are satisfied, the core_getHeartbeatElapsedCount() function SHALL read the Heartbeat Mechanism Based Address (CORE_HBT_ELAPSED_COUNT) at physical offset 0x01BC (MMAP_CORE_HBT_ELAPSED_COUNT) using readCoreReg(). core.c:core_getHeartbeatElapsedCount() Test Closed
LLR_CORE_CORE_GETHEARTBEATELAPSEDCOUNT_04 HLR_HBT_43822 WHEN all operational processing completes successfully, the core_getHeartbeatElapsedCount() function SHALL return DRV_SUCCESS. core.c:core_getHeartbeatElapsedCount() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_getHeartbeatElapsedCount() [Low-Level Device Drivers] Target readCoreReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_getHeartbeatElapsedCount() [Low-Level Device Drivers] Target readCoreReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Payload) r_b0->r_t0   *count (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_getHeartbeatElapsedCount start Entry: core_getHeartbeatElapsedCount() guard_1 LLR_01: Guard Check Is the pointer `count` is NULL (invalid)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is a driver operation reports a failure status other than DRV_SUCCESS? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `retStatus` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step read the Heartbeat Mechanism Based Address (CORE_HBT_ELAPSED_COUNT) at physical offset `0x01BC` (`MMAP_CORE_HBT_ELAPSED_COUNT`) using `readCoreReg()` guard_2->act_3 NO (FALSE) success_exit LLR_04: Final Exit return `DRV_SUCCESS` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_getHeartbeatElapsedCount in_store Input Data Sources & Parameters • baseAddress (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: count in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: retStatus proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via readCoreReg() proc_2->proc_3 Data Payload (readCoreReg) proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • count (UInt32) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_getHeartbeatElapsedCount Node1 core_getHeartbeatElapsed Count Node1->Node1 Node2 readCoreReg Node1->Node2 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
core_getHeartbeatElapsedCount Node1 core_getHeartbeatElapsed Count Node1->Node1 Node2 modHeartbeat_getElapsedTime Node1->Node2 Node2->Node2

◆ core_getHeartbeatResolution()

DriverStatus core_getHeartbeatResolution ( const UInt32 baseAddress,
UInt32 * resolution )

core_getHeartbeatResolution.

Get the heartbeat resolution.

Parameters
[in]baseAddressThe base address of the card to query.
[out]resolutionPointer to a variable to store the retrieved heartbeat resolution. (Resolution is in nanoseconds (ns))
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_PARAM: The provided address pointer is invalid.
DRV_INVALID_VALUE: The resolution value is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_getHeartbeatResolution

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_GETHEARTBEATRESOLUTION_01 HLR_HBT_43819 WHEN the pointer resolution is NULL (invalid), the core_getHeartbeatResolution() function SHALL abort processing and return DRV_INVALID_PARAM. core.c:core_getHeartbeatResolution() Test Closed
LLR_CORE_CORE_GETHEARTBEATRESOLUTION_02 HLR_HBT_43819 WHEN a driver operation reports a failure status other than DRV_SUCCESS, the core_getHeartbeatResolution() function SHALL abort processing and return that driver failure status. core.c:core_getHeartbeatResolution() Test Closed
LLR_CORE_CORE_GETHEARTBEATRESOLUTION_03 HLR_HBT_43819 WHEN 0 is equal to resolution, the core_getHeartbeatResolution() function SHALL abort processing and return DRV_INVALID_VALUE. core.c:core_getHeartbeatResolution() Test Closed
LLR_CORE_CORE_GETHEARTBEATRESOLUTION_04 HLR_HBT_43819 WHEN preconditions are satisfied, the core_getHeartbeatResolution() function SHALL read the Heartbeat Mechanism Based Address (CORE_HBT_RESOLUTION) at physical offset 0x01B4 (MMAP_CORE_HBT_RESOLUTION) using readCoreReg(). core.c:core_getHeartbeatResolution() Test Closed
LLR_CORE_CORE_GETHEARTBEATRESOLUTION_05 HLR_HBT_43819 WHEN all operational processing completes successfully, the core_getHeartbeatResolution() function SHALL return DRV_SUCCESS. core.c:core_getHeartbeatResolution() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_getHeartbeatResolution() [Low-Level Device Drivers] Target readCoreReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_getHeartbeatResolution() [Low-Level Device Drivers] Target readCoreReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Payload) r_b0->r_t0   *resolution (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_getHeartbeatResolution start Entry: core_getHeartbeatResolution() guard_1 LLR_01: Guard Check Is the pointer `resolution` is NULL (invalid)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is a driver operation reports a failure status other than DRV_SUCCESS? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `retStatus` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is `0` is equal to `resolution`? guard_2->guard_3 err_exit_3 LLR_03 Error Exit abort processing and return `DRV_INVALID_VALUE` guard_3->err_exit_3 YES (TRUE) act_4 LLR_04: Action Step read the Heartbeat Mechanism Based Address (CORE_HBT_RESOLUTION) at physical offset `0x01B4` (`MMAP_CORE_HBT_RESOLUTION`) using `readCoreReg()` guard_3->act_4 NO (FALSE) success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_getHeartbeatResolution in_store Input Data Sources & Parameters • baseAddress (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: resolution in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: retStatus proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: resolution proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Payload Transformation • Process payload via readCoreReg() proc_3->proc_4 Data Payload (readCoreReg) proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • resolution (UInt32) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_getHeartbeatResolution Node1 core_getHeartbeatResolution Node1->Node1 Node2 readCoreReg Node1->Node2 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
core_getHeartbeatResolution Node1 core_getHeartbeatResolution Node1->Node1 Node2 modHeartbeat_setTimeout Node1->Node2 Node2->Node2

◆ core_getMemoryRegion()

DriverStatus core_getMemoryRegion ( RegionInfo * region)

core_getMemoryRegion.

Get memory region of MFB cards.

Parameters
[in]regionThe region of the card.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation it returns DRV_SUCCESS.
Return values
DRV_SUCCESS: Success.
DRV_INVALID_PARAM: The provided address pointer is invalid.
DRV_OPEN_FAILED: The module is unable to open.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_getMemoryRegion

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_GETMEMORYREGION_01 HLR_MFB_38198 WHEN the pointer region is NULL (invalid), the core_getMemoryRegion() function SHALL abort processing and return DRV_INVALID_PARAM. core.c:core_getMemoryRegion() Test Closed
LLR_CORE_CORE_GETMEMORYREGION_02 HLR_MFB_38198 WHEN retrieving memory region addresses or registering the available status memory region via interDrv_setAvailableRegion() fails (reporting a status other than Success), the core_getMemoryRegion() function SHALL abort processing and return DRV_OPEN_FAILED. core.c:core_getMemoryRegion() Test Closed
LLR_CORE_CORE_GETMEMORYREGION_03 HLR_MFB_38198 WHEN reading the 32-bit memory region status via interDrv_Read32() fails with a status other than INTF_SUCCESS, the core_getMemoryRegion() function SHALL abort processing and return DRV_OPEN_FAILED. core.c:core_getMemoryRegion() Test Closed
LLR_CORE_CORE_GETMEMORYREGION_04 HLR_MFB_38198 WHEN the endian-converted 32-bit memory region status word is not equal to 0x01 (status not ready), or configuring the available data memory region fails, the core_getMemoryRegion() function SHALL abort processing and return DRV_OPEN_FAILED. core.c:core_getMemoryRegion() Test Closed
LLR_CORE_CORE_GETMEMORYREGION_05 HLR_MFB_38198 WHEN preconditions are satisfied, the core_getMemoryRegion() function SHALL invoke routine interDrv_memoryRegion_getAddress() to execute target subsystem hardware operation. core.c:core_getMemoryRegion() Test Closed
LLR_CORE_CORE_GETMEMORYREGION_06 HLR_MFB_38198 WHEN preconditions are satisfied, the core_getMemoryRegion() function SHALL invoke routine interDrv_Read32() to execute target subsystem hardware operation. core.c:core_getMemoryRegion() Test Closed
LLR_CORE_CORE_GETMEMORYREGION_07 HLR_MFB_38198 WHEN preconditions are satisfied, the core_getMemoryRegion() function SHALL invoke routine interDrv_setAvailableRegion() to execute target subsystem hardware operation. core.c:core_getMemoryRegion() Test Closed
LLR_CORE_CORE_GETMEMORYREGION_08 HLR_MFB_38198 WHEN all operational processing completes successfully, the core_getMemoryRegion() function SHALL return DRV_SUCCESS. core.c:core_getMemoryRegion() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_getMemoryRegion() [Low-Level Device Drivers] Target interDrv_memoryRegion_getAddress() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   channelNum (Flag) l_t1->l_b1   opMode (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_getMemoryRegion() [Low-Level Device Drivers] Target interDrv_memoryRegion_getAddress() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   dataBufferPtr (Payload) r_b0->r_t0   *region (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_getMemoryRegion start Entry: core_getMemoryRegion() guard_1 LLR_01: Guard Check Is the pointer `region` is NULL (invalid)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `errStatus` is not equal to `Success`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_OPEN_FAILED` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is `interStatus` is not equal to `INTF_SUCCESS`? guard_2->guard_3 err_exit_3 LLR_03 Error Exit abort processing and return `DRV_OPEN_FAILED` guard_3->err_exit_3 YES (TRUE) guard_4 LLR_04: Guard Check Is ENDIAN_32(status) != 0x01? guard_3->guard_4 err_exit_4 LLR_04 Error Exit abort processing and return `DRV_OPEN_FAILED` guard_4->err_exit_4 YES (TRUE) act_5 LLR_05: Action Step invoke routine `interDrv_memoryRegion_getAddress()` to execute target subsystem hardware operation guard_4->act_5 NO (FALSE) act_6 LLR_06: Action Step invoke routine `interDrv_Read32()` to execute target subsystem hardware operation act_5->act_6 act_7 LLR_07: Action Step invoke routine `interDrv_setAvailableRegion()` to execute target subsystem hardware operation act_6->act_7 success_exit LLR_08: Final Exit return `DRV_SUCCESS` act_7->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_getMemoryRegion in_store Input Data Sources & Parameters • Function Inputs & Subsystem State proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: region in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: errStatus proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: interStatus proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Validation Check • Evaluate Parameter / State: ENDIAN_32 proc_3->proc_4 Validated Input Data proc_5 LLR_05: Data Payload Transformation • Process payload via interDrv_memoryRegion_getAddress() proc_4->proc_5 Data Payload (interDrv_memoryRegion_getAddress) proc_6 LLR_06: Data Payload Transformation • Process payload via interDrv_Read32() proc_5->proc_6 Data Payload (interDrv_Read32) proc_7 LLR_07: Data Payload Transformation • Process payload via interDrv_setAvailableRegion() proc_6->proc_7 Data Payload (interDrv_setAvailableRegion) proc_8 LLR_08: Status Output Packaging • Format Return Payload: DriverStatus proc_7->proc_8 Final Output Data out_sink Output Data Sinks & Status Return • region (RegionInfo) proc_8->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_getMemoryRegion Node1 core_getMemoryRegion Node1->Node1 Node2 interDrv_memoryRegion _getAddress Node1->Node2 Node3 interDrv_Read32 Node1->Node3 Node6 interDrv_setAvailableRegion Node1->Node6 Node2->Node2 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_registerAvailable Region Node6->Node7 Node7->Node7 Node8 interDrv_isRegionRegistered Node7->Node8 Node8->Node8
Here is the caller graph for this function:
core_getMemoryRegion Node1 core_getMemoryRegion Node1->Node1 Node2 modConfig_open Node1->Node2 Node2->Node2

◆ core_getMfbReadyStatus()

DriverStatus core_getMfbReadyStatus ( const UInt8 mfbIndex,
MfbReadyStatus * mfbStatusPtr )

core_getMfbReadyStatus.

Get the MFB ready status.

Parameters
[in]mfbIndexThe MFB index.
[out]mfbStatusPtrPointer to a MfbReadyStatus structure to store the retrieved
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_PARAM: The mfbStatusPtr memory region is invalid.
DRV_INVALID_DEVICE: The GPIO device is invalid.
DRV_NOT_INITIALIZED: The GPIO is not initialized.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_getMfbReadyStatus

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_GETMFBREADYSTATUS_01 HLR_MFB_31353 WHEN the MFB GPIO subsystem is not initialized, the core_getMfbReadyStatus() function SHALL abort processing and return DRV_NOT_INITIALIZED. core.c:core_getMfbReadyStatus() Test Closed
LLR_CORE_CORE_GETMFBREADYSTATUS_02 HLR_MFB_31353 WHEN the pointer mfbStatusPtr is NULL (invalid), the core_getMfbReadyStatus() function SHALL abort processing and return DRV_INVALID_PARAM. core.c:core_getMfbReadyStatus() Test Closed
LLR_CORE_CORE_GETMFBREADYSTATUS_03 HLR_MFB_31353 WHEN mfbIndex is equal to CORE_MFB1_INDEX, the core_getMfbReadyStatus() function SHALL read the MFB1 hardware ready line using gpioIODeviceDrv_read() at pin CORE_MFB1_READY_IO. core.c:core_getMfbReadyStatus() Test Closed
LLR_CORE_CORE_GETMFBREADYSTATUS_04 HLR_MFB_31353 WHEN mfbIndex is equal to CORE_MFB2_INDEX, the core_getMfbReadyStatus() function SHALL read the MFB2 hardware ready line using gpioIODeviceDrv_read() at pin CORE_MFB2_READY_IO. core.c:core_getMfbReadyStatus() Test Closed
LLR_CORE_CORE_GETMFBREADYSTATUS_05 HLR_MFB_31353 WHEN mfbIndex is neither CORE_MFB1_INDEX nor CORE_MFB2_INDEX, the core_getMfbReadyStatus() function SHALL abort processing and return DRV_INVALID_DEVICE. core.c:core_getMfbReadyStatus() Test Closed
LLR_CORE_CORE_GETMFBREADYSTATUS_06 HLR_MFB_31353 WHEN the sampled GPIO pin state is NXPGPIO_HIGH, the core_getMfbReadyStatus() function SHALL record *mfbStatusPtr as MFB_READY. core.c:core_getMfbReadyStatus() Test Closed
LLR_CORE_CORE_GETMFBREADYSTATUS_07 HLR_MFB_31353 WHEN the sampled GPIO pin state is not NXPGPIO_HIGH, the core_getMfbReadyStatus() function SHALL record *mfbStatusPtr as MFB_NOT_READY. core.c:core_getMfbReadyStatus() Test Closed
LLR_CORE_CORE_GETMFBREADYSTATUS_08 HLR_MFB_31353 WHEN all operational processing completes successfully, the core_getMfbReadyStatus() function SHALL return DRV_SUCCESS. core.c:core_getMfbReadyStatus() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_getMfbReadyStatus() [Low-Level Device Drivers] Target gpioIODeviceDrv_read() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   mfbIndex (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_getMfbReadyStatus() [Low-Level Device Drivers] Target gpioIODeviceDrv_read() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   mfbIndex (Payload) r_b0->r_t0   *mfbStatusPtr (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_getMfbReadyStatus start Entry: core_getMfbReadyStatus() guard_1 LLR_01: Guard Check Is `mfbIoInit` is equal to `FALSE`? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_NOT_INITIALIZED` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is the pointer `mfbStatusPtr` is NULL (invalid)? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is `mfbIndex` is equal to `CORE_MFB1_INDEX`? guard_2->guard_3 err_exit_3 LLR_03 Error Exit abort processing and return `DRV_READ_FAILED` guard_3->err_exit_3 YES (TRUE) guard_4 LLR_04: Guard Check Is `mfbIndex` is equal to `CORE_MFB2_INDEX`? guard_3->guard_4 err_exit_4 LLR_04 Error Exit abort processing and return `DRV_READ_FAILED` guard_4->err_exit_4 YES (TRUE) guard_5 LLR_05: Guard Check Is `mfbStatus` is equal to `NXPGPIO_HIGH`? guard_4->guard_5 err_exit_5 LLR_05 Error Exit execute conditional operational branch guard_5->err_exit_5 YES (TRUE) act_6 LLR_06: Action Step invoke routine `gpioIODeviceDrv_read()` to execute target subsystem hardware operation guard_5->act_6 NO (FALSE) success_exit LLR_07: Final Exit return `DRV_SUCCESS` act_6->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_getMfbReadyStatus in_store Input Data Sources & Parameters • mfbIndex (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: mfbIoInit in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: mfbStatusPtr proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: mfbIndex proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Validation Check • Evaluate Parameter / State: mfbIndex proc_3->proc_4 Validated Input Data proc_5 LLR_05: Data Validation Check • Evaluate Parameter / State: mfbStatus proc_4->proc_5 Validated Input Data proc_6 LLR_06: Data Payload Transformation • Process payload via gpioIODeviceDrv_read() proc_5->proc_6 Data Payload (gpioIODeviceDrv_read) proc_7 LLR_07: Status Output Packaging • Format Return Payload: DriverStatus proc_6->proc_7 Final Output Data out_sink Output Data Sinks & Status Return • mfbStatusPtr (MfbReadyStatus) proc_7->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_getMfbReadyStatus Node1 core_getMfbReadyStatus Node1->Node1
Here is the caller graph for this function:
core_getMfbReadyStatus Node1 core_getMfbReadyStatus Node1->Node1 Node2 modConfig_open Node1->Node2 Node3 modHeartbeat_disableHeartbeat Node1->Node3 Node5 modHeartbeat_enableHeartbeat Node1->Node5 Node6 modHeartbeat_feedHeartbeat Node1->Node6 Node7 modHeartbeat_getElapsedTime Node1->Node7 Node8 modHeartbeat_setTimeout Node1->Node8 Node9 modHsb_getMfbCbit Node1->Node9 Node2->Node2 Node3->Node3 Node4 modConfig_close Node3->Node4 Node4->Node4 Node5->Node5 Node6->Node6 Node7->Node7 Node8->Node8 Node9->Node9

◆ core_mfbIoInit()

DriverStatus core_mfbIoInit ( void )

core_mfbIoInit.

Initializes the GPIO device.

Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_mfbIoInit

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_MFBIOINIT_01 HLR_MFB_38198 WHEN the driver status is not equal to DRIVER_SUCCESS, the core_mfbIoInit() function SHALL abort processing and return DRV_WRITE_FAILED. core.c:core_mfbIoInit() Test Closed
LLR_CORE_CORE_MFBIOINIT_02 HLR_MFB_38198 WHEN preconditions are satisfied, the core_mfbIoInit() function SHALL invoke routine gpioIODeviceDrv_setDirection() to execute target subsystem hardware operation. core.c:core_mfbIoInit() Test Closed
LLR_CORE_CORE_MFBIOINIT_03 HLR_MFB_38198 WHEN all operational processing completes successfully, the core_mfbIoInit() function SHALL return DRV_SUCCESS. core.c:core_mfbIoInit() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_mfbIoInit() [Low-Level Device Drivers] Target gpioIODeviceDrv_setDirection() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   channelNum (Flag) l_t1->l_b1   opMode (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_mfbIoInit() [Low-Level Device Drivers] Target gpioIODeviceDrv_setDirection() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   dataBufferPtr (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_mfbIoInit start Entry: core_mfbIoInit() guard_1 LLR_01: Guard Check Is `retStatus` is not equal to `DRIVER_SUCCESS`? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_WRITE_FAILED` guard_1->err_exit_1 YES (TRUE) act_2 LLR_02: Action Step invoke routine `gpioIODeviceDrv_setDirection()` to execute target subsystem hardware operation guard_1->act_2 NO (FALSE) success_exit LLR_03: Final Exit return `DRV_SUCCESS` act_2->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_mfbIoInit in_store Input Data Sources & Parameters • Function Inputs & Subsystem State proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: retStatus in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via gpioIODeviceDrv_setDirection() proc_1->proc_2 Data Payload (gpioIODeviceDrv_setDirection) proc_3 LLR_03: Status Output Packaging • Format Return Payload: DriverStatus proc_2->proc_3 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_3->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_mfbIoInit Node1 core_mfbIoInit Node1->Node1
Here is the caller graph for this function:
core_mfbIoInit Node1 core_mfbIoInit Node1->Node1 Node2 modConfig_coreRegister Node1->Node2 Node2->Node2

◆ core_nvsramRead32()

DriverStatus core_nvsramRead32 ( void *const buff,
const UInt32 offset )

core_nvsramRead32.

Reads a 32-bit value from the specified address offset in NVSRAM.

Parameters
[in]offsetThe offset address of the card to query.
[out]buffPointer to a variable to store the retrieved 32-bit data.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation it returns DRV_SUCCESS.
Return values
DRV_SUCCESS: Success.
DRV_OPEN_FAILEDThe module is unable to open.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_nvsramRead32

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_NVSRAMREAD32_01 HLR_MFB_31353 WHEN the buffer pointer buff is NULL (invalid), the core_nvsramRead32() function SHALL abort processing and return DRV_INVALID_PARAM. core.c:core_nvsramRead32() Test Closed
LLR_CORE_CORE_NVSRAMREAD32_02 HLR_MFB_31353 WHEN the NVSRAM device is not open (invalid device handle), the core_nvsramRead32() function SHALL abort processing and return DRV_OPEN_FAILED. core.c:core_nvsramRead32() Test Closed
LLR_CORE_CORE_NVSRAMREAD32_03 HLR_MFB_31353 WHEN reading from NVSRAM via nvsram_read() fails (status not equal to DRIVER_SUCCESS), the core_nvsramRead32() function SHALL abort processing and return DRV_READ_FAILED. core.c:core_nvsramRead32() Test Closed
LLR_CORE_CORE_NVSRAMREAD32_04 HLR_MFB_31353 WHEN preconditions are satisfied, the core_nvsramRead32() function SHALL read a 32-bit word from NVSRAM offset offset into destination buffer buff using nvsram_read(). core.c:core_nvsramRead32() Test Closed
LLR_CORE_CORE_NVSRAMREAD32_05 HLR_MFB_31353 WHEN all operational processing completes successfully, the core_nvsramRead32() function SHALL return DRV_SUCCESS. core.c:core_nvsramRead32() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_nvsramRead32() [Low-Level Device Drivers] Target interDrv_Write32() / MMIO [Hardware Abstraction Layer] Caller:s->Target:n l_t0->l_b0   buff (Flag) l_t1->l_b1   offset (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_nvsramRead32() [Low-Level Device Drivers] Target interDrv_Write32() / MMIO [Hardware Abstraction Layer] Caller:s->Target:n l_t0->l_b0   buff (Payload) l_t1->l_b1   offset (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_nvsramRead32 start Entry: core_nvsramRead32() guard_1 LLR_01: Guard Check Is the pointer `buff` is NULL (invalid)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `nvsramID` is equal to `CORE_NVSRAM_INVALID_ID`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_OPEN_FAILED` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is nvsram_read(nvsramID, buff, offset, sizeof(UInt32)) != DRIVER_SUCCESS? guard_2->guard_3 err_exit_3 LLR_03 Error Exit abort processing and return `DRV_READ_FAILED` guard_3->err_exit_3 YES (TRUE) act_4 LLR_04: Action Step execute operational data processing and state transformations guard_3->act_4 NO (FALSE) success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_nvsramRead32 in_store Input Data Sources & Parameters • buff (void *const) • offset (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: buff in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: nvsramID proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: nvsram_read proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Mutation & Processing • Transformed Entity: core_nvsramRead32 proc_3->proc_4 Transformed Data (core_nvsramRead32) proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_nvsramRead32 Node1 core_nvsramRead32 Node1->Node1
Here is the caller graph for this function:
core_nvsramRead32 Node1 core_nvsramRead32 Node1->Node1 Node2 nvsramReadBIT Node1->Node2 Node2->Node2 Node3 modHsb_readA429Cbit Node2->Node3 Node4 modHsb_readA429Pbit Node2->Node4 Node5 modHsb_readAnalogInCbit Node2->Node5 Node6 modHsb_readAnalogInPbit Node2->Node6 Node7 modHsb_readDiscreteInCbit Node2->Node7 Node8 modHsb_readDiscreteInPbit Node2->Node8 Node9 modHsb_readDiscreteOutCbit Node2->Node9 Node10 modHsb_readDiscreteOutPbit Node2->Node10 Node11 modHsb_readPowerFail Node2->Node11 Node12 modHsb_readPsuCbit Node2->Node12 Node13 modHsb_readPwmCbit Node2->Node13 Node14 modHsb_readPwmPbit Node2->Node14 Node15 modHsb_readRvdtCbit Node2->Node15 Node16 modHsb_readRvdtPbit Node2->Node16 Node3->Node3 Node4->Node4 Node5->Node5 Node6->Node6 Node7->Node7 Node8->Node8 Node9->Node9 Node10->Node10 Node11->Node11 Node12->Node12 Node13->Node13 Node14->Node14 Node15->Node15 Node16->Node16

◆ core_nvsramWrite32()

DriverStatus core_nvsramWrite32 ( void const * buff,
const UInt32 offset )

core_nvsramWrite32.

Write a 32-bit value to the specified address offset in NVSRAM.

Parameters
[in]offsetThe offset address of the card to query.
[in]buffPointer to the 32-bit data to be written to NVSRAM.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation it returns DRV_SUCCESS.
Return values
DRV_SUCCESS: Success.
Returns
DRV_OPEN_FAILED : The module is unable to open.
DRV_WRITE_FAILED : Failed to write to the device or module.
DRV_INVALID_PARAM : The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_nvsramWrite32

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_NVSRAMWRITE32_01 HLR_MFB_31353 WHEN the buffer pointer buff is NULL (invalid), the core_nvsramWrite32() function SHALL abort processing and return DRV_INVALID_PARAM. core.c:core_nvsramWrite32() Test Closed
LLR_CORE_CORE_NVSRAMWRITE32_02 HLR_MFB_31353 WHEN the NVSRAM device is not open (invalid device handle), the core_nvsramWrite32() function SHALL abort processing and return DRV_OPEN_FAILED. core.c:core_nvsramWrite32() Test Closed
LLR_CORE_CORE_NVSRAMWRITE32_03 HLR_MFB_31353 WHEN writing to NVSRAM via nvsram_write() fails (status not equal to DRIVER_SUCCESS), the core_nvsramWrite32() function SHALL abort processing and return DRV_WRITE_FAILED. core.c:core_nvsramWrite32() Test Closed
LLR_CORE_CORE_NVSRAMWRITE32_04 HLR_MFB_31353 WHEN preconditions are satisfied, the core_nvsramWrite32() function SHALL write a 32-bit word from source buffer buff to NVSRAM offset offset using nvsram_write(). core.c:core_nvsramWrite32() Test Closed
LLR_CORE_CORE_NVSRAMWRITE32_05 HLR_MFB_31353 WHEN all operational processing completes successfully, the core_nvsramWrite32() function SHALL return DRV_SUCCESS. core.c:core_nvsramWrite32() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_nvsramWrite32() [Low-Level Device Drivers] Target interDrv_Write32() / MMIO [Hardware Abstraction Layer] Caller:s->Target:n l_t0->l_b0   buff (Flag) l_t1->l_b1   offset (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_nvsramWrite32() [Low-Level Device Drivers] Target interDrv_Write32() / MMIO [Hardware Abstraction Layer] Caller:s->Target:n l_t0->l_b0   buff (Payload) l_t1->l_b1   offset (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_nvsramWrite32 start Entry: core_nvsramWrite32() guard_1 LLR_01: Guard Check Is the pointer `buff` is NULL (invalid)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `nvsramID` is equal to `CORE_NVSRAM_INVALID_ID`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_OPEN_FAILED` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is nvsram_write(nvsramID, buff, offset, sizeof(UInt32)) != DRIVER_SUCCESS? guard_2->guard_3 err_exit_3 LLR_03 Error Exit abort processing and return `DRV_WRITE_FAILED` guard_3->err_exit_3 YES (TRUE) act_4 LLR_04: Action Step execute operational data processing and state transformations guard_3->act_4 NO (FALSE) success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_nvsramWrite32 in_store Input Data Sources & Parameters • buff (void const) • offset (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: buff in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: nvsramID proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: nvsram_write proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Mutation & Processing • Transformed Entity: core_nvsramWrite32 proc_3->proc_4 Transformed Data (core_nvsramWrite32) proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_nvsramWrite32 Node1 core_nvsramWrite32 Node1->Node1
Here is the caller graph for this function:
core_nvsramWrite32 Node1 core_nvsramWrite32 Node1->Node1 Node2 nvsramWriteBIT Node1->Node2 Node2->Node2 Node3 modHsb_writeA429Cbit Node2->Node3 Node4 modHsb_writeA429Pbit Node2->Node4 Node5 modHsb_writeAnalogInCbit Node2->Node5 Node6 modHsb_writeAnalogInPbit Node2->Node6 Node7 modHsb_writeDiscreteInCbit Node2->Node7 Node8 modHsb_writeDiscreteInPbit Node2->Node8 Node9 modHsb_writeDiscreteOutCbit Node2->Node9 Node10 modHsb_writeDiscreteOutPbit Node2->Node10 Node11 modHsb_writePowerFail Node2->Node11 Node12 modHsb_writePsuCbit Node2->Node12 Node13 modHsb_writePwmCbit Node2->Node13 Node14 modHsb_writePwmPbit Node2->Node14 Node15 modHsb_writeRvdtCbit Node2->Node15 Node16 modHsb_writeRvdtPbit Node2->Node16 Node3->Node3 Node4->Node4 Node5->Node5 Node6->Node6 Node7->Node7 Node8->Node8 Node9->Node9 Node10->Node10 Node11->Node11 Node12->Node12 Node13->Node13 Node14->Node14 Node15->Node15 Node16->Node16

◆ core_register()

DriverStatus core_register ( const void * gpIODev4,
const void * nvsramMR )

core_register.

Initializes the GPIO device and NVSRAM memory region.

Parameters
[in]gpIODev4The GPIO device number to initialize.
[in]nvsramMRThe NVSRAM memory region to initialize.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_INVALID_DEVICE: The gpIODev4 device is invalid.
DRV_INVALID_PARAM: The nvsramMR memory region is invalid.
DRV_OPEN_FAILED: Failed to initialize NVSRAM.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_register

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_REGISTER_01 HLR_MFB_38198 WHEN the pointer gpIODev4 is NULL (invalid), the core_register() function SHALL abort processing and return DRV_INVALID_DEVICE. core.c:core_register() Test Closed
LLR_CORE_CORE_REGISTER_02 HLR_MFB_38198 WHEN the pointer nvsramMR is NULL (invalid), the core_register() function SHALL abort processing and return DRV_INVALID_PARAM. core.c:core_register() Test Closed
LLR_CORE_CORE_REGISTER_03 HLR_MFB_38198 WHEN interDrv_memoryRegion_getAddress(&pciDeviceNvsram) == Success, the core_register() function SHALL abort processing and return DRV_OPEN_FAILED. core.c:core_register() Test Closed
LLR_CORE_CORE_REGISTER_04 HLR_MFB_38198 WHEN preconditions are satisfied, the core_register() function SHALL invoke routine nvsram_init() to execute target subsystem hardware operation. core.c:core_register() Test Closed
LLR_CORE_CORE_REGISTER_05 HLR_MFB_38198 WHEN all operational processing completes successfully, the core_register() function SHALL return DRV_SUCCESS. core.c:core_register() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_register() [Low-Level Device Drivers] Target nvsram_init() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   gpIODev4 (Flag) l_t1->l_b1   nvsramMR (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_register() [Low-Level Device Drivers] Target nvsram_init() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   gpIODev4 (Payload) l_t1->l_b1   nvsramMR (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_register start Entry: core_register() guard_1 LLR_01: Guard Check Is the pointer `gpIODev4` is NULL (invalid)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_DEVICE` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is the pointer `nvsramMR` is NULL (invalid)? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is interDrv_memoryRegion_getAddress(&pciDeviceNvsram) == Success? guard_2->guard_3 err_exit_3 LLR_03 Error Exit abort processing and return `DRV_OPEN_FAILED` guard_3->err_exit_3 YES (TRUE) act_4 LLR_04: Action Step invoke routine `nvsram_init()` to execute target subsystem hardware operation guard_3->act_4 NO (FALSE) success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_register in_store Input Data Sources & Parameters • gpIODev4 (const IODevice) • nvsramMR (const MemoryRegion) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: gpIODev4 in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: nvsramMR proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: interDrv_memoryRegion_getAddress proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Payload Transformation • Process payload via nvsram_init() proc_3->proc_4 Data Payload (nvsram_init) proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_register Node1 core_register Node1->Node1 Node2 interDrv_memoryRegion _getAddress Node1->Node2 Node3 interDrv_setAvailableRegion Node1->Node3 Node2->Node2 Node3->Node3 Node4 interDrv_registerAvailable Region Node3->Node4 Node4->Node4 Node5 interDrv_isRegionRegistered Node4->Node5 Node5->Node5
Here is the caller graph for this function:
core_register Node1 core_register Node1->Node1 Node2 modConfig_coreRegister Node1->Node2 Node2->Node2

◆ core_setHeartbeatTimeoutCount()

DriverStatus core_setHeartbeatTimeoutCount ( const UInt32 baseAddress,
const UInt32 count )

core_setHeartbeatTimeoutCount.

Set the heartbeat timeout count.

Parameters
[in]baseAddressThe base address of the card to query.
[in]countThe heartbeat timeout count to set.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device or module.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_setHeartbeatTimeoutCount

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_SETHEARTBEATTIMEOUTCOUNT_01 HLR_HBT_43819 WHEN a driver operation reports a failure status other than DRV_SUCCESS, the core_setHeartbeatTimeoutCount() function SHALL abort processing and return that driver failure status. core.c:core_setHeartbeatTimeoutCount() Test Closed
LLR_CORE_CORE_SETHEARTBEATTIMEOUTCOUNT_02 HLR_HBT_43819 WHEN preconditions are satisfied, the core_setHeartbeatTimeoutCount() function SHALL write the Heartbeat Mechanism Based Address (CORE_HBT_TIMEOUT_COUNT) at physical offset 0x01B8 (MMAP_CORE_HBT_TIMEOUT_COUNT) using writeCoreReg(). core.c:core_setHeartbeatTimeoutCount() Test Closed
LLR_CORE_CORE_SETHEARTBEATTIMEOUTCOUNT_03 HLR_HBT_43819 WHEN all operational processing completes successfully, the core_setHeartbeatTimeoutCount() function SHALL return DRV_SUCCESS. core.c:core_setHeartbeatTimeoutCount() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_setHeartbeatTimeoutCount() [Low-Level Device Drivers] Target writeCoreReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Flag) l_t1->l_b1   count (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_setHeartbeatTimeoutCount() [Low-Level Device Drivers] Target writeCoreReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Payload) l_t1->l_b1   count (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_setHeartbeatTimeoutCount start Entry: core_setHeartbeatTimeoutCount() guard_1 LLR_01: Guard Check Is a driver operation reports a failure status other than DRV_SUCCESS? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `retStatus` guard_1->err_exit_1 YES (TRUE) act_2 LLR_02: Action Step write the Heartbeat Mechanism Based Address (CORE_HBT_TIMEOUT_COUNT) at physical offset `0x01B8` (`MMAP_CORE_HBT_TIMEOUT_COUNT`) using `writeCoreReg()` guard_1->act_2 NO (FALSE) success_exit LLR_03: Final Exit return `DRV_SUCCESS` act_2->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_setHeartbeatTimeoutCount in_store Input Data Sources & Parameters • baseAddress (const UInt32) • count (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: retStatus in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via writeCoreReg() proc_1->proc_2 Data Payload (writeCoreReg) proc_3 LLR_03: Status Output Packaging • Format Return Payload: DriverStatus proc_2->proc_3 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_3->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_setHeartbeatTimeoutCount Node1 core_setHeartbeatTimeout Count Node1->Node1 Node2 writeCoreReg Node1->Node2 Node2->Node2 Node3 interDrv_Write32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Write32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
core_setHeartbeatTimeoutCount Node1 core_setHeartbeatTimeout Count Node1->Node1 Node2 modHeartbeat_setTimeout Node1->Node2 Node2->Node2

◆ core_statusLEDInit()

DriverStatus core_statusLEDInit ( void )

core_statusLEDInit.

Initializes the status LED functionality. core_register() must be configured before calling this function.

Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_NOT_INITIALIZED: The GPIO is not initialized.
DRV_WRITE_FAILED: Failed to write to the device or module.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_statusLEDInit

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_STATUSLEDINIT_01 HLR_IO_31289 WHEN the core driver subsystem is not initialized, the core_statusLEDInit() function SHALL abort processing and return DRV_NOT_INITIALIZED. core.c:core_statusLEDInit() Test Closed
LLR_CORE_CORE_STATUSLEDINIT_02 HLR_IO_31289 WHEN the core driver subsystem is initialized, the core_statusLEDInit() function SHALL configure GPIO pins CORE_STATUS_LED_RED and CORE_STATUS_LED_GREEN as outputs using gpioIODeviceDrv_setDirection(). core.c:core_statusLEDInit() Test Closed
LLR_CORE_CORE_STATUSLEDINIT_03 HLR_IO_31289 WHEN writing the initial logic low state to the red status LED (CORE_STATUS_LED_RED) fails (driver write status not equal to DRIVER_SUCCESS), the core_statusLEDInit() function SHALL abort processing and return DRV_WRITE_FAILED. core.c:core_statusLEDInit() Test Closed
LLR_CORE_CORE_STATUSLEDINIT_04 HLR_IO_31289 WHEN writing the initial logic low state to the green status LED (CORE_STATUS_LED_GREEN) fails (driver write status not equal to DRIVER_SUCCESS), the core_statusLEDInit() function SHALL abort processing and return DRV_WRITE_FAILED. core.c:core_statusLEDInit() Test Closed
LLR_CORE_CORE_STATUSLEDINIT_05 HLR_IO_31289 WHEN both status LEDs are configured and initialized successfully, the core_statusLEDInit() function SHALL return DRV_SUCCESS. core.c:core_statusLEDInit() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_statusLEDInit() [Low-Level Device Drivers] Target gpioIODeviceDrv_setDirection() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   channelNum (Flag) l_t1->l_b1   opMode (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_statusLEDInit() [Low-Level Device Drivers] Target gpioIODeviceDrv_setDirection() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   dataBufferPtr (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_statusLEDInit start Entry: core_statusLEDInit() guard_1 LLR_01: Guard Check Is `coreInit` is equal to `FALSE`? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_NOT_INITIALIZED` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `statusRed` is not equal to `DRIVER_SUCCESS`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_WRITE_FAILED` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is `statusGreen` is not equal to `DRIVER_SUCCESS`? guard_2->guard_3 err_exit_3 LLR_03 Error Exit abort processing and return `DRV_WRITE_FAILED` guard_3->err_exit_3 YES (TRUE) act_4 LLR_04: Action Step invoke routine `gpioIODeviceDrv_setDirection()` to execute target subsystem hardware operation guard_3->act_4 NO (FALSE) act_5 LLR_05: Action Step invoke routine `gpioIODeviceDrv_write()` to execute target subsystem hardware operation act_4->act_5 success_exit LLR_06: Final Exit return `DRV_SUCCESS` act_5->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_statusLEDInit in_store Input Data Sources & Parameters • Function Inputs & Subsystem State proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: coreInit in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: statusRed proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: statusGreen proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Payload Transformation • Process payload via gpioIODeviceDrv_setDirection() proc_3->proc_4 Data Payload (gpioIODeviceDrv_setDirection) proc_5 LLR_05: Data Payload Transformation • Process payload via gpioIODeviceDrv_write() proc_4->proc_5 Data Payload (gpioIODeviceDrv_write) proc_6 LLR_06: Status Output Packaging • Format Return Payload: DriverStatus proc_5->proc_6 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_6->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_statusLEDInit Node1 core_statusLEDInit Node1->Node1
Here is the caller graph for this function:
core_statusLEDInit Node1 core_statusLEDInit Node1->Node1 Node2 modConfig_coreRegister Node1->Node2 Node2->Node2

◆ core_statusLEDSet()

DriverStatus core_statusLEDSet ( const UInt32 color)

core_statusLEDSet.

Configures the status LED to display the specified color. core_statusLEDInit() must be called before calling this function.

Parameters
[in]colorThe color to set for the status LED.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_NOT_INITIALIZED: The LED GPIO is not initialized.
DRV_WRITE_FAILED: Failed to write to the device or module.
DRV_INVALID_CONFIG: Invalid color configuration.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_statusLEDSet

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_STATUSLEDSET_01 HLR_IO_31289 WHEN gpioLEDInit is equal to FALSE, the core_statusLEDSet() function SHALL abort processing and return DRV_NOT_INITIALIZED. core.c:core_statusLEDSet() Test Closed
LLR_CORE_CORE_STATUSLEDSET_02 HLR_IO_31289 WHEN CORE_LED_COLOR_RED is equal to color, the core_statusLEDSet() function SHALL abort processing and return DRV_WRITE_FAILED. core.c:core_statusLEDSet() Test Closed
LLR_CORE_CORE_STATUSLEDSET_03 HLR_IO_31289 WHEN CORE_LED_COLOR_GREEN is equal to color, the core_statusLEDSet() function SHALL abort processing and return DRV_WRITE_FAILED. core.c:core_statusLEDSet() Test Closed
LLR_CORE_CORE_STATUSLEDSET_04 HLR_IO_31289 WHEN CORE_LED_COLOR_YELLOW is equal to color, the core_statusLEDSet() function SHALL abort processing and return DRV_WRITE_FAILED. core.c:core_statusLEDSet() Test Closed
LLR_CORE_CORE_STATUSLEDSET_05 HLR_IO_31289 WHEN CORE_LED_COLOR_OFF is equal to color, the core_statusLEDSet() function SHALL abort processing and return DRV_WRITE_FAILED. core.c:core_statusLEDSet() Test Closed
LLR_CORE_CORE_STATUSLEDSET_06 HLR_IO_31289 WHEN preconditions are satisfied, the core_statusLEDSet() function SHALL invoke routine gpioIODeviceDrv_write() to execute target subsystem hardware operation. core.c:core_statusLEDSet() Test Closed
LLR_CORE_CORE_STATUSLEDSET_07 HLR_IO_31289 WHEN all operational processing completes successfully, the core_statusLEDSet() function SHALL return DRV_SUCCESS. core.c:core_statusLEDSet() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_statusLEDSet() [Low-Level Device Drivers] Target gpioIODeviceDrv_write() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   color (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_statusLEDSet() [Low-Level Device Drivers] Target gpioIODeviceDrv_write() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   color (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_statusLEDSet start Entry: core_statusLEDSet() guard_1 LLR_01: Guard Check Is `gpioLEDInit` is equal to `FALSE`? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_NOT_INITIALIZED` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `CORE_LED_COLOR_RED` is equal to `color`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_WRITE_FAILED` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is `CORE_LED_COLOR_GREEN` is equal to `color`? guard_2->guard_3 err_exit_3 LLR_03 Error Exit abort processing and return `DRV_WRITE_FAILED` guard_3->err_exit_3 YES (TRUE) guard_4 LLR_04: Guard Check Is `CORE_LED_COLOR_YELLOW` is equal to `color`? guard_3->guard_4 err_exit_4 LLR_04 Error Exit abort processing and return `DRV_WRITE_FAILED` guard_4->err_exit_4 YES (TRUE) guard_5 LLR_05: Guard Check Is `CORE_LED_COLOR_OFF` is equal to `color`? guard_4->guard_5 err_exit_5 LLR_05 Error Exit abort processing and return `DRV_WRITE_FAILED` guard_5->err_exit_5 YES (TRUE) act_6 LLR_06: Action Step invoke routine `gpioIODeviceDrv_write()` to execute target subsystem hardware operation guard_5->act_6 NO (FALSE) success_exit LLR_07: Final Exit return `DRV_SUCCESS` act_6->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_statusLEDSet in_store Input Data Sources & Parameters • color (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: gpioLEDInit in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: CORE_LED_COLOR_RED proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: CORE_LED_COLOR_GREEN proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Validation Check • Evaluate Parameter / State: CORE_LED_COLOR_YELLOW proc_3->proc_4 Validated Input Data proc_5 LLR_05: Data Validation Check • Evaluate Parameter / State: CORE_LED_COLOR_OFF proc_4->proc_5 Validated Input Data proc_6 LLR_06: Data Payload Transformation • Process payload via gpioIODeviceDrv_write() proc_5->proc_6 Data Payload (gpioIODeviceDrv_write) proc_7 LLR_07: Status Output Packaging • Format Return Payload: DriverStatus proc_6->proc_7 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_7->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_statusLEDSet Node1 core_statusLEDSet Node1->Node1
Here is the caller graph for this function:
core_statusLEDSet Node1 core_statusLEDSet Node1->Node1 Node2 modConfig_coreChasisLEDSet Node1->Node2 Node2->Node2

◆ core_statusPwrFailGet()

DriverStatus core_statusPwrFailGet ( PowerFailState * pwrFailStatusPtr)

core_statusPwrFailGet.

Get the Power Fail status from the PSU interrupt signal. core_statusPwrFailInit() must be called before calling this function.

Parameters
[out]pwrFailStatusPtrPointer for power fail status.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: Failed to read from the device or module.
DRV_INVALID_PARAM: The provided address pointer is invalid.
DRV_INVALID_CONFIG: The GPIO is not initialized.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_statusPwrFailGet

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_STATUSPWRFAILGET_01 HLR_MFB_38198 WHEN the pointer pwrFailStatusPtr is NULL (invalid), the core_statusPwrFailGet() function SHALL abort processing and return DRV_INVALID_PARAM. core.c:core_statusPwrFailGet() Test Closed
LLR_CORE_CORE_STATUSPWRFAILGET_02 HLR_MFB_38198 WHEN gpioPwrFailInit is equal to FALSE, the core_statusPwrFailGet() function SHALL abort processing and return DRV_INVALID_CONFIG. core.c:core_statusPwrFailGet() Test Closed
LLR_CORE_CORE_STATUSPWRFAILGET_03 HLR_MFB_38198 WHEN reading the GPIO power-fail status via gpioIODeviceDrv_read() reports a status other than DRIVER_SUCCESS, the core_statusPwrFailGet() function SHALL abort processing and return DRV_READ_FAILED. core.c:core_statusPwrFailGet() Test Closed
LLR_CORE_CORE_STATUSPWRFAILGET_04 HLR_MFB_38198 WHEN preconditions are satisfied, the core_statusPwrFailGet() function SHALL invoke routine gpioIODeviceDrv_read() to execute target subsystem hardware operation. core.c:core_statusPwrFailGet() Test Closed
LLR_CORE_CORE_STATUSPWRFAILGET_05 HLR_MFB_38198 WHEN all operational processing completes successfully, the core_statusPwrFailGet() function SHALL return DRV_SUCCESS. core.c:core_statusPwrFailGet() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_statusPwrFailGet() [Low-Level Device Drivers] Target gpioIODeviceDrv_read() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   channelNum (Flag) l_t1->l_b1   opMode (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_statusPwrFailGet() [Low-Level Device Drivers] Target gpioIODeviceDrv_read() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   dataBufferPtr (Payload) r_b0->r_t0   *pwrFailStatusPtr (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_statusPwrFailGet start Entry: core_statusPwrFailGet() guard_1 LLR_01: Guard Check Is the pointer `pwrFailStatusPtr` is NULL (invalid)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `gpioPwrFailInit` is equal to `FALSE`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_INVALID_CONFIG` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is `status` is not equal to `DRIVER_SUCCESS`? guard_2->guard_3 err_exit_3 LLR_03 Error Exit abort processing and return `DRV_READ_FAILED` guard_3->err_exit_3 YES (TRUE) act_4 LLR_04: Action Step invoke routine `gpioIODeviceDrv_read()` to execute target subsystem hardware operation guard_3->act_4 NO (FALSE) success_exit LLR_05: Final Exit return `DRV_SUCCESS` act_4->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_statusPwrFailGet in_store Input Data Sources & Parameters • Function Inputs & Subsystem State proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: pwrFailStatusPtr in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: gpioPwrFailInit proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: status proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Payload Transformation • Process payload via gpioIODeviceDrv_read() proc_3->proc_4 Data Payload (gpioIODeviceDrv_read) proc_5 LLR_05: Status Output Packaging • Format Return Payload: DriverStatus proc_4->proc_5 Final Output Data out_sink Output Data Sinks & Status Return • pwrFailStatusPtr (PowerFailState) proc_5->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_statusPwrFailGet Node1 core_statusPwrFailGet Node1->Node1
Here is the caller graph for this function:
core_statusPwrFailGet Node1 core_statusPwrFailGet Node1->Node1 Node2 modHsb_getPowerFail Node1->Node2 Node2->Node2

◆ core_statusPwrFailInit()

DriverStatus core_statusPwrFailInit ( void )

core_statusPwrFailInit.

Initialize the power fail monitor. core_register() must be configured before calling this function.

Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_NOT_INITIALIZED: The GPIO is not initialized.
DRV_OPEN_FAILED: The module is unable to open.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: core_statusPwrFailInit

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_CORE_STATUSPWRFAILINIT_01 HLR_MFB_38198 WHEN coreInit is equal to FALSE, the core_statusPwrFailInit() function SHALL abort processing and return DRV_NOT_INITIALIZED. core.c:core_statusPwrFailInit() Test Closed
LLR_CORE_CORE_STATUSPWRFAILINIT_02 HLR_MFB_38198 WHEN configuring the GPIO power-fail direction via gpioIODeviceDrv_setDirection() reports a status other than DRIVER_SUCCESS, the core_statusPwrFailInit() function SHALL abort processing and return DRV_OPEN_FAILED. core.c:core_statusPwrFailInit() Test Closed
LLR_CORE_CORE_STATUSPWRFAILINIT_03 HLR_MFB_38198 WHEN preconditions are satisfied, the core_statusPwrFailInit() function SHALL invoke routine gpioIODeviceDrv_setDirection() to execute target subsystem hardware operation. core.c:core_statusPwrFailInit() Test Closed
LLR_CORE_CORE_STATUSPWRFAILINIT_04 HLR_MFB_38198 WHEN all operational processing completes successfully, the core_statusPwrFailInit() function SHALL return DRV_SUCCESS. core.c:core_statusPwrFailInit() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller core_statusPwrFailInit() [Low-Level Device Drivers] Target gpioIODeviceDrv_setDirection() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   channelNum (Flag) l_t1->l_b1   opMode (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller core_statusPwrFailInit() [Low-Level Device Drivers] Target gpioIODeviceDrv_setDirection() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   dataBufferPtr (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_core_statusPwrFailInit start Entry: core_statusPwrFailInit() guard_1 LLR_01: Guard Check Is `coreInit` is equal to `FALSE`? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_NOT_INITIALIZED` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `status` is not equal to `DRIVER_SUCCESS`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_OPEN_FAILED` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step invoke routine `gpioIODeviceDrv_setDirection()` to execute target subsystem hardware operation guard_2->act_3 NO (FALSE) success_exit LLR_04: Final Exit return `DRV_SUCCESS` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_core_statusPwrFailInit in_store Input Data Sources & Parameters • Function Inputs & Subsystem State proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: coreInit in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: status proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via gpioIODeviceDrv_setDirection() proc_2->proc_3 Data Payload (gpioIODeviceDrv_setDirection) proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
core_statusPwrFailInit Node1 core_statusPwrFailInit Node1->Node1
Here is the caller graph for this function:
core_statusPwrFailInit Node1 core_statusPwrFailInit Node1->Node1 Node2 modConfig_coreRegister Node1->Node2 Node2->Node2

◆ readCoreReg()

DriverStatus readCoreReg ( const UInt32 baseAddress,
const UInt32 offset,
UInt32 * data )
static

readCoreReg - Core PCIe read function.

Parameters
[in]baseAddressThe base address of the module and device.
[in]offsetThe offset address from module base address.
[out]data32bit data to read from PCIe.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: PCIe failed to read value.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: readCoreReg

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_READCOREREG_01 HLR_IO_31289 WHEN the pointer data is NULL (invalid), the readCoreReg() function SHALL abort processing and return DRV_INVALID_PARAM. core.c:readCoreReg() Test Closed
LLR_CORE_READCOREREG_02 HLR_IO_31289 WHEN the pointer data is valid, the readCoreReg() function SHALL read a 32-bit register value from physical memory address (baseAddress + addrOffset) into *data using PCIe primitive interDrv_Read32(). core.c:readCoreReg() Test Closed
LLR_CORE_READCOREREG_03 HLR_IO_31289 WHEN memory access via interDrv_Read32() fails (status not equal to INTF_SUCCESS), the readCoreReg() function SHALL abort processing and return DRV_READ_FAILED. core.c:readCoreReg() Test Closed
LLR_CORE_READCOREREG_04 HLR_IO_31289 WHEN all operational processing completes successfully, the readCoreReg() function SHALL return DRV_SUCCESS. core.c:readCoreReg() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller readCoreReg() [Low-Level Device Drivers] Target interDrv_Read32() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Flag) l_t1->l_b1   offset (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller readCoreReg() [Low-Level Device Drivers] Target interDrv_Read32() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Payload) l_t1->l_b1   offset (Payload) r_b0->r_t0   *data (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_readCoreReg start Entry: readCoreReg() guard_1 LLR_01: Guard Check Is the pointer `data` is NULL (invalid)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `intStatus` is not equal to `INTF_SUCCESS`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_READ_FAILED` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step invoke PCIe primitive `interDrv_Read32()` to read 32-bit word from physical memory address `baseAddress + addrOffset` into `*data` guard_2->act_3 NO (FALSE) success_exit LLR_04: Final Exit return `DRV_SUCCESS` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_readCoreReg in_store Input Data Sources & Parameters • baseAddress (const UInt32) • offset (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: data in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: intStatus proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via interDrv_Read32() proc_2->proc_3 Data Payload (interDrv_Read32) proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • data (UInt32) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
readCoreReg Node1 readCoreReg Node1->Node1 Node2 interDrv_Read32 Node1->Node2 Node2->Node2 Node3 interDrv_isAddressValid Node2->Node3 Node4 memoryMap_Read32 Node2->Node4 Node3->Node3 Node4->Node4
Here is the caller graph for this function:
readCoreReg Node1 readCoreReg Node1->Node1 Node2 core_getHeartbeatElapsed Count Node1->Node2 Node4 core_getHeartbeatResolution Node1->Node4 Node2->Node2 Node3 modHeartbeat_getElapsedTime Node2->Node3 Node3->Node3 Node4->Node4 Node5 modHeartbeat_setTimeout Node4->Node5 Node5->Node5

◆ writeCoreReg()

DriverStatus writeCoreReg ( const UInt32 baseAddress,
const UInt32 offset,
const UInt32 data )
static

writeCoreReg - Core PCIe write function.

Parameters
[in]baseAddressThe base address of the module and device.
[in]offsetThe offset address from module base address.
[in]data32bit data to write to PCIe.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: PCIe failed to write value.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: writeCoreReg

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_CORE_WRITECOREREG_01 HLR_IO_31289 WHEN invoked, the writeCoreReg() function SHALL write the 32-bit word data to physical memory address (baseAddress + addrOffset) using PCIe primitive interDrv_Write32(). core.c:writeCoreReg() Test Closed
LLR_CORE_WRITECOREREG_02 HLR_IO_31289 WHEN memory access via interDrv_Write32() fails (status not equal to INTF_SUCCESS), the writeCoreReg() function SHALL abort processing and return DRV_WRITE_FAILED. core.c:writeCoreReg() Test Closed
LLR_CORE_WRITECOREREG_03 HLR_IO_31289 WHEN all operational processing completes successfully, the writeCoreReg() function SHALL return DRV_SUCCESS. core.c:writeCoreReg() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller writeCoreReg() [Low-Level Device Drivers] Target interDrv_Write32() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Flag) l_t1->l_b1   offset (Flag) l_t2->l_b2   data (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller writeCoreReg() [Low-Level Device Drivers] Target interDrv_Write32() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   baseAddress (Payload) l_t1->l_b1   offset (Payload) l_t2->l_b2   data (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_writeCoreReg start Entry: writeCoreReg() guard_1 LLR_01: Guard Check Is `intStatus` is not equal to `INTF_SUCCESS`? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_WRITE_FAILED` guard_1->err_exit_1 YES (TRUE) act_2 LLR_02: Action Step invoke PCIe primitive `interDrv_Write32()` to write 32-bit word `data` to physical memory address `baseAddress + addrOffset` guard_1->act_2 NO (FALSE) success_exit LLR_03: Final Exit invoke PCIe primitive `interDrv_Write32()` to write 32-bit word `data` to physical memory address `baseAddress + addrOffset` act_2->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_writeCoreReg in_store Input Data Sources & Parameters • baseAddress (const UInt32) • offset (const UInt32) • data (const UInt32) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: intStatus in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Payload Transformation • Process payload via interDrv_Write32() proc_1->proc_2 Data Payload (interDrv_Write32) proc_3 LLR_03: Status Output Packaging • Format Return Payload: DriverStatus proc_2->proc_3 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_3->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
writeCoreReg Node1 writeCoreReg Node1->Node1 Node2 interDrv_Write32 Node1->Node2 Node2->Node2 Node3 interDrv_isAddressValid Node2->Node3 Node4 memoryMap_Write32 Node2->Node4 Node3->Node3 Node4->Node4
Here is the caller graph for this function:
writeCoreReg Node1 writeCoreReg Node1->Node1 Node2 core_enableDisableHeartbeat Node1->Node2 Node6 core_feedHeartbeat Node1->Node6 Node8 core_setHeartbeatTimeout Count Node1->Node8 Node2->Node2 Node3 modHeartbeat_disableHeartbeat Node2->Node3 Node5 modHeartbeat_enableHeartbeat Node2->Node5 Node3->Node3 Node4 modConfig_close Node3->Node4 Node4->Node4 Node5->Node5 Node6->Node6 Node7 modHeartbeat_feedHeartbeat Node6->Node7 Node7->Node7 Node8->Node8 Node9 modHeartbeat_setTimeout Node8->Node9 Node9->Node9

Variable Documentation

◆ coreInit

Bool coreInit = FALSE
static

◆ gpioLEDInit

Bool gpioLEDInit = FALSE
static

◆ gpioPwrFailInit

Bool gpioPwrFailInit = FALSE
static

◆ ioDevSBCGpioDev4

void* ioDevSBCGpioDev4 = 0
static

◆ mfbIoInit

Bool mfbIoInit = FALSE
static

◆ nvsramID

UInt32 nvsramID = (0xFFU)
static

◆ pciDeviceNvsram

RegionInfo pciDeviceNvsram = { 0 }
static