HFCC-01 Low-Level Software (LLSW) Rel_6802_HFCC-01-RP-CSAR-CB
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pwm.h File Reference

Pwm driver layer header file. More...

#include "commonDataTypes.h"
#include "driverStatus.h"
Include dependency graph for pwm.h:
pwm.h Node1 pwm.h Node2 commonDataTypes.h Node1->Node2 Node3 driverStatus.h Node1->Node3
This graph shows which files directly or indirectly include this file:
pwm.h Node1 pwm.h Node2 modHsb.c Node1->Node2 Node3 modPwm.c Node1->Node3 Node4 pwm.c Node1->Node4

Go to the source code of this file.

Data Structures

struct  PwmPbitStatus
 Pulse Width Modulation (PWM) Power-On Built-In Test (PBIT) Diagnostic Status Structure. More...
struct  PwmCbitStatus
 Pulse Width Modulation (PWM) Continuous Built-In Test (CBIT) Diagnostic Status Structure. More...
struct  PwmDevHandler
 Pulse Width Modulation (PWM) Peripheral Hardware Device Handler Structure. More...

Macros

#define PWM_DEV_CH_MAX   (4U)
#define PWM_CHANNEL_MAX   (6U)
#define PWM_DUTY_CYCLE_MAX   (100U)
#define PWM_ULD   (0x02U)
#define PWM_SG_COND   (0x03U)

Enumerations

enum  PwmBITState { PWM_BIT_PASS = 0U , PWM_BIT_FAIL = 1U }
 Pulse Width Modulation (PWM) Built-In Test (BIT) Pass/Fail Evaluation State. More...

Functions

DriverStatus pwm_getPbit (const PwmDevHandler pwmDevHdl, PwmPbitStatus *pbitStatus)
 pwm_getPbit.
DriverStatus pwm_getCbit (const PwmDevHandler pwmDevHdl, PwmCbitStatus *cbitStatus)
 pwm_getCbit.
DriverStatus pwm_getTemp (const PwmDevHandler pwmDevHdl, Float32 *temp)
 pwm_getTemp.
DriverStatus pwm_enable (const PwmDevHandler pwmDevHdl, const UInt8 pwmChannel)
 pwm_enable.
DriverStatus pwm_disable (const PwmDevHandler pwmDevHdl, const UInt8 pwmChannel)
 pwm_disable.
DriverStatus pwm_setFrequencyDutycycle (const PwmDevHandler pwmDevHdl, const UInt16 frequency, const UInt16 dutyCycle)
 pwm_setFrequencyDutycycle.

Detailed Description

Pwm driver layer header file.

Author
Ramza Anuar ramza.nosp@m..anu.nosp@m.ar@tu.nosp@m.sas..nosp@m.my

PWM device driver header file

Macro Definition Documentation

◆ PWM_CHANNEL_MAX

#define PWM_CHANNEL_MAX   (6U)

◆ PWM_DEV_CH_MAX

#define PWM_DEV_CH_MAX   (4U)

◆ PWM_DUTY_CYCLE_MAX

#define PWM_DUTY_CYCLE_MAX   (100U)

◆ PWM_SG_COND

#define PWM_SG_COND   (0x03U)

◆ PWM_ULD

#define PWM_ULD   (0x02U)

Enumeration Type Documentation

◆ PwmBITState

enum PwmBITState

Pulse Width Modulation (PWM) Built-In Test (BIT) Pass/Fail Evaluation State.

Enumerator
PWM_BIT_PASS 

PWM Built-In Test (BIT) pass condition.

PWM_BIT_FAIL 

PWM Built-In Test (BIT) failure condition.

PWM Built-In Test (BIT) failure condition.

Function Documentation

◆ pwm_disable()

DriverStatus pwm_disable ( const PwmDevHandler pwmDevHdl,
const UInt8 pwmChannel )

pwm_disable.

Disable PWM channel.

Parameters
[in]pwmDevHdlThe pwm device handler.
[in]pwmChannelThe pwm channel.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device.
DRV_READ_FAILED: Failed to read from the device.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_OP_ALREADY_PERFORMED: The pwm channel is already disabled.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: pwm_disable

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_PWM_PWM_DISABLE_01 HLR_PWM_23291 WHEN pwmChannel is greater than PWM_CHANNEL_MAX, the pwm_disable() function SHALL abort processing and return DRV_INVALID_CHANNEL. pwm.c:pwm_disable() Test Closed
LLR_PWM_PWM_DISABLE_02 HLR_PWM_23291 WHEN a driver operation reports a failure status other than DRV_SUCCESS, the pwm_disable() function SHALL abort processing and return that driver failure status. pwm.c:pwm_disable() Test Closed
LLR_PWM_PWM_DISABLE_03 HLR_PWM_23291 WHEN READ_BIT(data, pwmChannel) == FALSE, the pwm_disable() function SHALL abort processing and return DRV_OP_ALREADY_PERFORMED. pwm.c:pwm_disable() Test Closed
LLR_PWM_PWM_DISABLE_04 HLR_PWM_23291 WHEN preconditions are satisfied, the pwm_disable() function SHALL read the device block members memory offset (PWM_BANK_CH_STATE) at physical offset 0x0078 (MMAP_PWM_BANK_CH_STATE) using readPwmReg(). pwm.c:pwm_disable() Test Closed
LLR_PWM_PWM_DISABLE_05 HLR_PWM_23291 WHEN preconditions are satisfied, the pwm_disable() function SHALL write the device block members memory offset (PWM_BANK_CH_STATE) at physical offset 0x0078 (MMAP_PWM_BANK_CH_STATE) using writePwmReg(). pwm.c:pwm_disable() Test Closed
LLR_PWM_PWM_DISABLE_06 HLR_PWM_23291 WHEN all operational processing completes successfully, the pwm_disable() function SHALL return DRV_SUCCESS. pwm.c:pwm_disable() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller pwm_disable() [Low-Level Device Drivers] Target readPwmReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   pwmDevHdl (Flag) l_t1->l_b1   pwmChannel (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller pwm_disable() [Low-Level Device Drivers] Target readPwmReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   pwmDevHdl (Payload) l_t1->l_b1   pwmChannel (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_pwm_disable start Entry: pwm_disable() guard_1 LLR_01: Guard Check Is `pwmChannel` is greater than `PWM_CHANNEL_MAX`? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is a driver operation reports a failure status other than DRV_SUCCESS? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `retStatus` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is READ_BIT(data, pwmChannel) == FALSE? guard_2->guard_3 err_exit_3 LLR_03 Error Exit abort processing and return `DRV_OP_ALREADY_PERFORMED` guard_3->err_exit_3 YES (TRUE) act_4 LLR_04: Action Step read the device block members memory offset (PWM_BANK_CH_STATE) at physical offset `0x0078` (`MMAP_PWM_BANK_CH_STATE`) using `readPwmReg()` guard_3->act_4 NO (FALSE) act_5 LLR_05: Action Step write the device block members memory offset (PWM_BANK_CH_STATE) at physical offset `0x0078` (`MMAP_PWM_BANK_CH_STATE`) using `writePwmReg()` act_4->act_5 success_exit LLR_06: Final Exit return `DRV_SUCCESS` act_5->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_pwm_disable in_store Input Data Sources & Parameters • pwmDevHdl (const PwmDevHandler) • pwmChannel (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: pwmChannel in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: retStatus proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: READ_BIT proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Payload Transformation • Process payload via readPwmReg() proc_3->proc_4 Data Payload (readPwmReg) proc_5 LLR_05: Data Payload Transformation • Process payload via writePwmReg() proc_4->proc_5 Data Payload (writePwmReg) proc_6 LLR_06: Status Output Packaging • Format Return Payload: DriverStatus proc_5->proc_6 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_6->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
pwm_disable Node1 pwm_disable Node1->Node1 Node2 readPwmReg Node1->Node2 Node6 writePwmReg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
pwm_disable Node1 pwm_disable Node1->Node1 Node2 modPwm_disable Node1->Node2 Node2->Node2 Node3 modPwm_initReset Node2->Node3 Node3->Node3 Node4 modConfig_init Node3->Node4 Node5 modConfig_reset Node3->Node5 Node4->Node4 Node5->Node5 Node6 modConfig_close Node5->Node6 Node6->Node6

◆ pwm_enable()

DriverStatus pwm_enable ( const PwmDevHandler pwmDevHdl,
const UInt8 pwmChannel )

pwm_enable.

Enable PWM channel.

Parameters
[in]pwmDevHdlThe pwm device handler.
[in]pwmChannelThe pwm channel.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device.
DRV_READ_FAILED: Failed to read from the device.
DRV_INVALID_CHANNEL: The channel number is invalid.
DRV_OP_ALREADY_PERFORMED: The pwm channel is already enabled.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: pwm_enable

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_PWM_PWM_ENABLE_01 HLR_PWM_23291 WHEN pwmChannel is greater than PWM_CHANNEL_MAX, the pwm_enable() function SHALL abort processing and return DRV_INVALID_CHANNEL. pwm.c:pwm_enable() Test Closed
LLR_PWM_PWM_ENABLE_02 HLR_PWM_23291 WHEN a driver operation reports a failure status other than DRV_SUCCESS, the pwm_enable() function SHALL abort processing and return that driver failure status. pwm.c:pwm_enable() Test Closed
LLR_PWM_PWM_ENABLE_03 HLR_PWM_23291 WHEN READ_BIT(data, pwmChannel) == TRUE, the pwm_enable() function SHALL abort processing and return DRV_OP_ALREADY_PERFORMED. pwm.c:pwm_enable() Test Closed
LLR_PWM_PWM_ENABLE_04 HLR_PWM_23291 WHEN preconditions are satisfied, the pwm_enable() function SHALL read the device block members memory offset (PWM_BANK_CH_STATE) at physical offset 0x0078 (MMAP_PWM_BANK_CH_STATE) using readPwmReg(). pwm.c:pwm_enable() Test Closed
LLR_PWM_PWM_ENABLE_05 HLR_PWM_23291 WHEN preconditions are satisfied, the pwm_enable() function SHALL write the device block members memory offset (PWM_BANK_CH_STATE) at physical offset 0x0078 (MMAP_PWM_BANK_CH_STATE) using writePwmReg(). pwm.c:pwm_enable() Test Closed
LLR_PWM_PWM_ENABLE_06 HLR_PWM_23291 WHEN all operational processing completes successfully, the pwm_enable() function SHALL return DRV_SUCCESS. pwm.c:pwm_enable() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller pwm_enable() [Low-Level Device Drivers] Target readPwmReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   pwmDevHdl (Flag) l_t1->l_b1   pwmChannel (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller pwm_enable() [Low-Level Device Drivers] Target readPwmReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   pwmDevHdl (Payload) l_t1->l_b1   pwmChannel (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_pwm_enable start Entry: pwm_enable() guard_1 LLR_01: Guard Check Is `pwmChannel` is greater than `PWM_CHANNEL_MAX`? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_CHANNEL` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is a driver operation reports a failure status other than DRV_SUCCESS? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `retStatus` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is READ_BIT(data, pwmChannel) == TRUE? guard_2->guard_3 err_exit_3 LLR_03 Error Exit abort processing and return `DRV_OP_ALREADY_PERFORMED` guard_3->err_exit_3 YES (TRUE) act_4 LLR_04: Action Step read the device block members memory offset (PWM_BANK_CH_STATE) at physical offset `0x0078` (`MMAP_PWM_BANK_CH_STATE`) using `readPwmReg()` guard_3->act_4 NO (FALSE) act_5 LLR_05: Action Step write the device block members memory offset (PWM_BANK_CH_STATE) at physical offset `0x0078` (`MMAP_PWM_BANK_CH_STATE`) using `writePwmReg()` act_4->act_5 success_exit LLR_06: Final Exit return `DRV_SUCCESS` act_5->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_pwm_enable in_store Input Data Sources & Parameters • pwmDevHdl (const PwmDevHandler) • pwmChannel (const UInt8) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: pwmChannel in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: retStatus proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: READ_BIT proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Payload Transformation • Process payload via readPwmReg() proc_3->proc_4 Data Payload (readPwmReg) proc_5 LLR_05: Data Payload Transformation • Process payload via writePwmReg() proc_4->proc_5 Data Payload (writePwmReg) proc_6 LLR_06: Status Output Packaging • Format Return Payload: DriverStatus proc_5->proc_6 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_6->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
pwm_enable Node1 pwm_enable Node1->Node1 Node2 readPwmReg Node1->Node2 Node6 writePwmReg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
pwm_enable Node1 pwm_enable Node1->Node1 Node2 modPwm_enable Node1->Node2 Node2->Node2

◆ pwm_getCbit()

DriverStatus pwm_getCbit ( const PwmDevHandler pwmDevHdl,
PwmCbitStatus * cbitStatus )

pwm_getCbit.

PWM get CBIT status.

Parameters
[in]pwmDevHdlThe pwm device handler.
[out]cbitStatusThe pointer of CBIT status value.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: Failed to read from the device.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: pwm_getCbit

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_PWM_PWM_GETCBIT_01 HLR_PWM_26203 WHEN the pointer cbitStatus is NULL (invalid), the pwm_getCbit() function SHALL abort processing and return DRV_INVALID_PARAM. pwm.c:pwm_getCbit() Test Closed
LLR_PWM_PWM_GETCBIT_02 HLR_PWM_26203 WHEN a driver operation reports a failure status other than DRV_SUCCESS, the pwm_getCbit() function SHALL abort processing and return that driver failure status. pwm.c:pwm_getCbit() Test Closed
LLR_PWM_PWM_GETCBIT_03 HLR_PWM_26203 WHEN querying PWM Channel Bank 1, the pwm_getCbit() function SHALL read the global CBIT execution status (MMAP_PWM_POS_CBIT_NOT_RUN) and 5.5V supply fault status (MMAP_PWM_POS_CBIT_F_5V5) from the bank status register. pwm.c:pwm_getCbit() Test Closed
LLR_PWM_PWM_GETCBIT_04 HLR_PWM_26203 FOR each PWM device bank, WHEN the soft-ground clutch state is not active (TRUE), the pwm_getCbit() function SHALL clear the under-load fault status (PWM_BIT_PASS) for that bank. pwm.c:pwm_getCbit() Test Closed
LLR_PWM_PWM_GETCBIT_05 HLR_PWM_26203 FOR each configured PWM device bank (0 through PWM_DEV_CH_MAX - 1), the pwm_getCbit() function SHALL calculate the register offset using MMAP_PWM_DEV_OFFSET and read the bank fault status (MMAP_PWM_BANK_STATUS_FAULT) via readPwmReg(). pwm.c:pwm_getCbit() Test Closed
LLR_PWM_PWM_GETCBIT_06 HLR_PWM_26203 WHEN preconditions are satisfied, the pwm_getCbit() function SHALL invoke bitwise routine READ_BIT() to extract target channel status bit from register payload. pwm.c:pwm_getCbit() Test Closed
LLR_PWM_PWM_GETCBIT_07 HLR_PWM_26203 WHEN all operational processing completes successfully, the pwm_getCbit() function SHALL return DRV_SUCCESS. pwm.c:pwm_getCbit() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller pwm_getCbit() [Low-Level Device Drivers] Target readPwmReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   pwmDevHdl (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller pwm_getCbit() [Low-Level Device Drivers] Target readPwmReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   pwmDevHdl (Payload) r_b0->r_t0   *cbitStatus (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_pwm_getCbit start Entry: pwm_getCbit() guard_1 LLR_01: Guard Check Is the pointer `cbitStatus` is NULL (invalid)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is a driver operation reports a failure status other than DRV_SUCCESS? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `retStatus` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is `i` is equal to `0U`? guard_2->guard_3 err_exit_3 LLR_03 Error Exit execute conditional operational branch guard_3->err_exit_3 YES (TRUE) guard_4 LLR_04: Guard Check Is `bankSGClchState` is not equal to `TRUE`? guard_3->guard_4 err_exit_4 LLR_04 Error Exit execute conditional operational branch guard_4->err_exit_4 YES (TRUE) act_5 LLR_05: Action Step read the device block members memory offset (PWM_BANK_STATUS_FAULT) at physical offset `0x0050 + (MMAP_PWM_DEV_OFFSET * i)` (`MMAP_PWM_BANK_STATUS_FAULT`) using `readPwmReg()` guard_4->act_5 NO (FALSE) act_6 LLR_06: Action Step invoke bitwise routine `READ_BIT()` to extract target channel status bit from register payload act_5->act_6 success_exit LLR_07: Final Exit return `DRV_SUCCESS` act_6->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_pwm_getCbit in_store Input Data Sources & Parameters • pwmDevHdl (const PwmDevHandler) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: cbitStatus in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: retStatus proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: i proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Validation Check • Evaluate Parameter / State: bankSGClchState proc_3->proc_4 Validated Input Data proc_5 LLR_05: Data Payload Transformation • Process payload via readPwmReg() proc_4->proc_5 Data Payload (readPwmReg) proc_6 LLR_06: Data Payload Transformation • Process payload via READ_BIT() proc_5->proc_6 Data Payload (READ_BIT) proc_7 LLR_07: Status Output Packaging • Format Return Payload: DriverStatus proc_6->proc_7 Final Output Data out_sink Output Data Sinks & Status Return • cbitStatus (PwmCbitStatus) proc_7->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
pwm_getCbit Node1 pwm_getCbit Node1->Node1 Node2 readPwmReg Node1->Node2 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
pwm_getCbit Node1 pwm_getCbit Node1->Node1 Node2 modHsb_getPwmCbit Node1->Node2 Node2->Node2

◆ pwm_getPbit()

DriverStatus pwm_getPbit ( const PwmDevHandler pwmDevHdl,
PwmPbitStatus * pbitStatus )

pwm_getPbit.

PWM get PBIT status.

Parameters
[in]pwmDevHdlThe pwm device handler.
[out]pbitStatusThe pointer of PBIT status value.
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: Failed to read from the device.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: pwm_getPbit

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_PWM_PWM_GETPBIT_01 HLR_PWM_26200 WHEN the pointer pbitStatus is NULL (invalid), the pwm_getPbit() function SHALL abort processing and return DRV_INVALID_PARAM. pwm.c:pwm_getPbit() Test Closed
LLR_PWM_PWM_GETPBIT_02 HLR_PWM_26200 WHEN a driver operation reports a failure status other than DRV_SUCCESS, the pwm_getPbit() function SHALL abort processing and return that driver failure status. pwm.c:pwm_getPbit() Test Closed
LLR_PWM_PWM_GETPBIT_03 HLR_PWM_26200 WHEN querying PWM Channel Bank 1, the pwm_getPbit() function SHALL read the global PBIT incomplete status (MMAP_PWM_POS_PBIT_INCOMPLETED) and 5.5V supply fault status (MMAP_PWM_POS_PBIT_F_5V5) from the PBIT status register. pwm.c:pwm_getPbit() Test Closed
LLR_PWM_PWM_GETPBIT_04 HLR_PWM_26200 FOR each configured PWM device bank (0 through PWM_DEV_CH_MAX - 1), the pwm_getPbit() function SHALL calculate the register offset using MMAP_PWM_DEV_OFFSET and read the bank PBIT Status Register (MMAP_PWM_PBIT_STATUS) via readPwmReg(). pwm.c:pwm_getPbit() Test Closed
LLR_PWM_PWM_GETPBIT_05 HLR_PWM_26200 WHEN preconditions are satisfied, the pwm_getPbit() function SHALL invoke bitwise routine READ_BIT() to extract target channel status bit from register payload. pwm.c:pwm_getPbit() Test Closed
LLR_PWM_PWM_GETPBIT_06 HLR_PWM_26200 WHEN all operational processing completes successfully, the pwm_getPbit() function SHALL return DRV_SUCCESS. pwm.c:pwm_getPbit() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller pwm_getPbit() [Low-Level Device Drivers] Target readPwmReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   pwmDevHdl (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller pwm_getPbit() [Low-Level Device Drivers] Target readPwmReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   pwmDevHdl (Payload) r_b0->r_t0   *pbitStatus (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_pwm_getPbit start Entry: pwm_getPbit() guard_1 LLR_01: Guard Check Is the pointer `pbitStatus` is NULL (invalid)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is a driver operation reports a failure status other than DRV_SUCCESS? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `retStatus` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is `i` is equal to `0U`? guard_2->guard_3 err_exit_3 LLR_03 Error Exit execute conditional operational branch guard_3->err_exit_3 YES (TRUE) act_4 LLR_04: Action Step read the PWM PBIT Status Register (PBIT_STATUS) at physical offset `0x0068 + (MMAP_PWM_DEV_OFFSET * i)` (`MMAP_PWM_PBIT_STATUS`) using `readPwmReg()` guard_3->act_4 NO (FALSE) act_5 LLR_05: Action Step invoke bitwise routine `READ_BIT()` to extract target channel status bit from register payload act_4->act_5 success_exit LLR_06: Final Exit return `DRV_SUCCESS` act_5->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_pwm_getPbit in_store Input Data Sources & Parameters • pwmDevHdl (const PwmDevHandler) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: pbitStatus in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: retStatus proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: i proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Payload Transformation • Process payload via readPwmReg() proc_3->proc_4 Data Payload (readPwmReg) proc_5 LLR_05: Data Payload Transformation • Process payload via READ_BIT() proc_4->proc_5 Data Payload (READ_BIT) proc_6 LLR_06: Status Output Packaging • Format Return Payload: DriverStatus proc_5->proc_6 Final Output Data out_sink Output Data Sinks & Status Return • pbitStatus (PwmPbitStatus) proc_6->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
pwm_getPbit Node1 pwm_getPbit Node1->Node1 Node2 readPwmReg Node1->Node2 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
pwm_getPbit Node1 pwm_getPbit Node1->Node1 Node2 modHsb_getPwmPbit Node1->Node2 Node2->Node2

◆ pwm_getTemp()

DriverStatus pwm_getTemp ( const PwmDevHandler pwmDevHdl,
Float32 * temp )

pwm_getTemp.

PWM get temperature value in degree Celsius (C).

Parameters
[in]pwmDevHdlThe pwm device handler.
[out]tempThe pointer of temperature value in degree Celsius (C).
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_READ_FAILED: Failed to read from the device.
DRV_INVALID_PARAM: The provided address pointer is invalid.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: pwm_getTemp

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_PWM_PWM_GETTEMP_01 HLR_PWM_30821 WHEN the pointer temp is NULL (invalid), the pwm_getTemp() function SHALL abort processing and return DRV_INVALID_PARAM. pwm.c:pwm_getTemp() Test Closed
LLR_PWM_PWM_GETTEMP_02 HLR_PWM_30821 WHEN a driver operation reports a failure status other than DRV_SUCCESS, the pwm_getTemp() function SHALL abort processing and return that driver failure status. pwm.c:pwm_getTemp() Test Closed
LLR_PWM_PWM_GETTEMP_03 HLR_PWM_30821 WHEN preconditions are satisfied, the pwm_getTemp() function SHALL read the device block members memory offset (PWM_TEMP_RAW) at physical offset 0x0060 (MMAP_PWM_TEMP_RAW) using readPwmReg(). pwm.c:pwm_getTemp() Test Closed
LLR_PWM_PWM_GETTEMP_04 HLR_PWM_30821 WHEN all operational processing completes successfully, the pwm_getTemp() function SHALL return DRV_SUCCESS. pwm.c:pwm_getTemp() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller pwm_getTemp() [Low-Level Device Drivers] Target readPwmReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   pwmDevHdl (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller pwm_getTemp() [Low-Level Device Drivers] Target readPwmReg() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   pwmDevHdl (Payload) r_b0->r_t0   *temp (Output Data)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_pwm_getTemp start Entry: pwm_getTemp() guard_1 LLR_01: Guard Check Is the pointer `temp` is NULL (invalid)? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_PARAM` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is a driver operation reports a failure status other than DRV_SUCCESS? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `retStatus` guard_2->err_exit_2 YES (TRUE) act_3 LLR_03: Action Step read the device block members memory offset (PWM_TEMP_RAW) at physical offset `0x0060` (`MMAP_PWM_TEMP_RAW`) using `readPwmReg()` guard_2->act_3 NO (FALSE) success_exit LLR_04: Final Exit return `DRV_SUCCESS` act_3->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_pwm_getTemp in_store Input Data Sources & Parameters • pwmDevHdl (const PwmDevHandler) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: temp in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: retStatus proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Payload Transformation • Process payload via readPwmReg() proc_2->proc_3 Data Payload (readPwmReg) proc_4 LLR_04: Status Output Packaging • Format Return Payload: DriverStatus proc_3->proc_4 Final Output Data out_sink Output Data Sinks & Status Return • temp (Float32) proc_4->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
pwm_getTemp Node1 pwm_getTemp Node1->Node1 Node2 readPwmReg Node1->Node2 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5
Here is the caller graph for this function:
pwm_getTemp Node1 pwm_getTemp Node1->Node1 Node2 modHsb_getPwmCbit Node1->Node2 Node2->Node2

◆ pwm_setFrequencyDutycycle()

DriverStatus pwm_setFrequencyDutycycle ( const PwmDevHandler pwmDevHdl,
const UInt16 frequency,
const UInt16 dutyCycle )

pwm_setFrequencyDutycycle.

Set the PWM frequency and duty cycle.

Parameters
[in]pwmDevHdlThe pwm device handler.
[in]frequencyThe pwm frequency in Hz.
[in]dutyCycleThe pwm duty cycle in percentage (0% - 100%).
Returns
DriverStatus - Driver status return code, If no error occurs during the operation of the function, it returns DRV_SUCCESS. Otherwise related error message is returned.
Return values
DRV_SUCCESS: Success.
DRV_WRITE_FAILED: Failed to write to the device.
DRV_READ_FAILED: Failed to read from the device.
DRV_INVALID_VALUE: The pwm duty cycle value is out of range.
DRV_VALIDATE_FAILED: The pwm frequency or duty cycle value is not set correctly in memory map.

Low-Level Software Requirements (LLR)

Low-Level Requirement Specification: pwm_setFrequencyDutycycle

Requirement ID Parent HLR ID Detailed Low-Level Requirement Statement (EARS Format) Software Unit Reference Verification Method Status
LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_01 HLR_PWM_23289 WHEN dutyCycle is greater than PWM_DUTY_CYCLE_MAX, the pwm_setFrequencyDutycycle() function SHALL abort processing and return DRV_INVALID_VALUE. pwm.c:pwm_setFrequencyDutycycle() Test Closed
LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_02 HLR_PWM_23289 WHEN frequency is equal to 0, the pwm_setFrequencyDutycycle() function SHALL abort processing and return DRV_INVALID_VALUE. pwm.c:pwm_setFrequencyDutycycle() Test Closed
LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_03 HLR_PWM_23289 WHEN a driver operation reports a failure status other than DRV_SUCCESS, the pwm_setFrequencyDutycycle() function SHALL abort processing and return that driver failure status. pwm.c:pwm_setFrequencyDutycycle() Test Closed
LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_04 HLR_PWM_23289 WHEN period register readback verification fails (readback value does not match the configured period count), the pwm_setFrequencyDutycycle() function SHALL abort processing and return DRV_VALIDATE_FAILED. pwm.c:pwm_setFrequencyDutycycle() Test Closed
LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_05 HLR_PWM_23289 WHEN on-time register readback verification fails (readback value does not match the configured active on-time count), the pwm_setFrequencyDutycycle() function SHALL abort processing and return DRV_VALIDATE_FAILED. pwm.c:pwm_setFrequencyDutycycle() Test Closed
LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_06 HLR_PWM_23289 WHEN preconditions are satisfied, the pwm_setFrequencyDutycycle() function SHALL invoke frequency macro HZ_() to compute pulse period tick count. pwm.c:pwm_setFrequencyDutycycle() Test Closed
LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_07 HLR_PWM_23289 WHEN preconditions are satisfied, the pwm_setFrequencyDutycycle() function SHALL write the device block members memory offset (PWM_PWM_PERIOD) at physical offset 0x0008 (MMAP_PWM_PWM_PERIOD) using writePwmReg(). pwm.c:pwm_setFrequencyDutycycle() Test Closed
LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_08 HLR_PWM_23289 WHEN preconditions are satisfied, the pwm_setFrequencyDutycycle() function SHALL write the device block members memory offset (PWM_PWM_ON_TIME) at physical offset 0x000C (MMAP_PWM_PWM_ON_TIME) using writePwmReg(). pwm.c:pwm_setFrequencyDutycycle() Test Closed
LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_09 HLR_PWM_23289 WHEN all operational processing completes successfully, the pwm_setFrequencyDutycycle() function SHALL return DRV_SUCCESS. pwm.c:pwm_setFrequencyDutycycle() Test Closed

Control Coupling Diagram (CCD)

ControlCouplingStructureChart Caller pwm_setFrequencyDutycycle() [Low-Level Device Drivers] Target HZ_() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   pwmDevHdl (Flag) l_t1->l_b1   frequency (Flag) l_t2->l_b2   dutyCycle (Flag) r_b0->r_t0   statusCode (DriverStatus)
Control Coupling Structure Chart

Data Coupling Diagram (DCD)

DataCouplingStructureChart Caller pwm_setFrequencyDutycycle() [Low-Level Device Drivers] Target HZ_() [Low-Level Driver Helper] Caller:s->Target:n l_t0->l_b0   pwmDevHdl (Payload) l_t1->l_b1   frequency (Payload) l_t2->l_b2   dutyCycle (Payload) r_b0->r_t0   stateTelemetry (Internal State)
Data Coupling Structure Chart

Control Flow Diagram (CFD)

cfd_pwm_setFrequencyDutycycle start Entry: pwm_setFrequencyDutycycle() guard_1 LLR_01: Guard Check Is `dutyCycle` is greater than `PWM_DUTY_CYCLE_MAX`? start->guard_1 err_exit_1 LLR_01 Error Exit abort processing and return `DRV_INVALID_VALUE` guard_1->err_exit_1 YES (TRUE) guard_2 LLR_02: Guard Check Is `frequency` is equal to `0`? guard_1->guard_2 err_exit_2 LLR_02 Error Exit abort processing and return `DRV_INVALID_VALUE` guard_2->err_exit_2 YES (TRUE) guard_3 LLR_03: Guard Check Is a driver operation reports a failure status other than DRV_SUCCESS? guard_2->guard_3 err_exit_3 LLR_03 Error Exit abort processing and return `retStatus` guard_3->err_exit_3 YES (TRUE) guard_4 LLR_04: Guard Check Is `periodLsbData` is not equal to `periodLsb`? guard_3->guard_4 err_exit_4 LLR_04 Error Exit abort processing and return `DRV_VALIDATE_FAILED` guard_4->err_exit_4 YES (TRUE) guard_5 LLR_05: Guard Check Is `onTimeData` is not equal to `onTime`? guard_4->guard_5 err_exit_5 LLR_05 Error Exit abort processing and return `DRV_VALIDATE_FAILED` guard_5->err_exit_5 YES (TRUE) act_6 LLR_06: Action Step invoke frequency macro `HZ_()` to compute pulse period tick count guard_5->act_6 NO (FALSE) act_7 LLR_07: Action Step write the device block members memory offset (PWM_PWM_PERIOD) at physical offset `0x0008` (`MMAP_PWM_PWM_PERIOD`) using `writePwmReg()` act_6->act_7 act_8 LLR_08: Action Step write the device block members memory offset (PWM_PWM_ON_TIME) at physical offset `0x000C` (`MMAP_PWM_PWM_ON_TIME`) using `writePwmReg()` act_7->act_8 success_exit LLR_09: Final Exit return `DRV_SUCCESS` act_8->success_exit
Control Flow Diagram

Data Flow Diagram (DFD)

dfd_pwm_setFrequencyDutycycle in_store Input Data Sources & Parameters • pwmDevHdl (const PwmDevHandler) • frequency (const UInt16) • dutyCycle (const UInt16) proc_1 LLR_01: Data Validation Check • Evaluate Parameter / State: dutyCycle in_store->proc_1 Validated Input Data proc_2 LLR_02: Data Validation Check • Evaluate Parameter / State: frequency proc_1->proc_2 Validated Input Data proc_3 LLR_03: Data Validation Check • Evaluate Parameter / State: retStatus proc_2->proc_3 Validated Input Data proc_4 LLR_04: Data Validation Check • Evaluate Parameter / State: periodLsbData proc_3->proc_4 Validated Input Data proc_5 LLR_05: Data Validation Check • Evaluate Parameter / State: onTimeData proc_4->proc_5 Validated Input Data proc_6 LLR_06: Data Payload Transformation • Process payload via HZ_() proc_5->proc_6 Data Payload (HZ_) proc_7 LLR_07: Data Payload Transformation • Process payload via writePwmReg() proc_6->proc_7 Data Payload (writePwmReg) proc_8 LLR_08: Data Payload Transformation • Process payload via writePwmReg() proc_7->proc_8 Data Payload (writePwmReg) proc_9 LLR_09: Status Output Packaging • Format Return Payload: DriverStatus proc_8->proc_9 Final Output Data out_sink Output Data Sinks & Status Return • Status Payload (DriverStatus) proc_9->out_sink Output Data & Status Code
Data Flow Diagram
Here is the call graph for this function:
pwm_setFrequencyDutycycle Node1 pwm_setFrequencyDutycycle Node1->Node1 Node2 readPwmReg Node1->Node2 Node6 writePwmReg Node1->Node6 Node2->Node2 Node3 interDrv_Read32 Node2->Node3 Node3->Node3 Node4 interDrv_isAddressValid Node3->Node4 Node5 memoryMap_Read32 Node3->Node5 Node4->Node4 Node5->Node5 Node6->Node6 Node7 interDrv_Write32 Node6->Node7 Node7->Node4 Node7->Node7 Node8 memoryMap_Write32 Node7->Node8 Node8->Node8
Here is the caller graph for this function:
pwm_setFrequencyDutycycle Node1 pwm_setFrequencyDutycycle Node1->Node1 Node2 modPwm_setFrequencyDutycycle Node1->Node2 Node2->Node2