|
HFCC-01 Low-Level Software (LLSW) Rel_6802_HFCC-01-RP-CSAR-CB
|
Pwm driver layer. More...
#include "pwm.h"#include "interDrv.h"#include "interStatus.h"#include "utilHelper.h"#include "mmapPwm.h"Functions | |
| static DriverStatus | readPwmReg (const UInt32 baseAddress, const UInt32 offset, UInt32 *data) |
| readPwmReg - pwm PCIe read function. | |
| static DriverStatus | writePwmReg (const UInt32 baseAddress, const UInt32 offset, const UInt32 data) |
| writePwmReg - pwm PCIe write function. | |
| DriverStatus | pwm_getPbit (const PwmDevHandler pwmDevHdl, PwmPbitStatus *pbitStatus) |
| pwm_getPbit. | |
| DriverStatus | pwm_getCbit (const PwmDevHandler pwmDevHdl, PwmCbitStatus *cbitStatus) |
| pwm_getCbit. | |
| DriverStatus | pwm_getTemp (const PwmDevHandler pwmDevHdl, Float32 *temp) |
| pwm_getTemp. | |
| DriverStatus | pwm_enable (const PwmDevHandler pwmDevHdl, const UInt8 pwmChannel) |
| pwm_enable. | |
| DriverStatus | pwm_disable (const PwmDevHandler pwmDevHdl, const UInt8 pwmChannel) |
| pwm_disable. | |
| DriverStatus | pwm_setFrequencyDutycycle (const PwmDevHandler pwmDevHdl, const UInt16 frequency, const UInt16 dutyCycle) |
| pwm_setFrequencyDutycycle. | |
Pwm driver layer.
PWM device driver file
| DriverStatus pwm_disable | ( | const PwmDevHandler | pwmDevHdl, |
| const UInt8 | pwmChannel ) |
pwm_disable.
Disable PWM channel.
| [in] | pwmDevHdl | The pwm device handler. |
| [in] | pwmChannel | The pwm channel. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device. |
| DRV_READ_FAILED | : Failed to read from the device. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_OP_ALREADY_PERFORMED | : The pwm channel is already disabled. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_PWM_PWM_DISABLE_01 | HLR_PWM_23291 | WHEN pwmChannel is greater than PWM_CHANNEL_MAX, the pwm_disable() function SHALL abort processing and return DRV_INVALID_CHANNEL. | pwm.c:pwm_disable() | Test | Closed |
| LLR_PWM_PWM_DISABLE_02 | HLR_PWM_23291 | WHEN a driver operation reports a failure status other than DRV_SUCCESS, the pwm_disable() function SHALL abort processing and return that driver failure status. | pwm.c:pwm_disable() | Test | Closed |
| LLR_PWM_PWM_DISABLE_03 | HLR_PWM_23291 | WHEN READ_BIT(data, pwmChannel) == FALSE, the pwm_disable() function SHALL abort processing and return DRV_OP_ALREADY_PERFORMED. | pwm.c:pwm_disable() | Test | Closed |
| LLR_PWM_PWM_DISABLE_04 | HLR_PWM_23291 | WHEN preconditions are satisfied, the pwm_disable() function SHALL read the device block members memory offset (PWM_BANK_CH_STATE) at physical offset 0x0078 (MMAP_PWM_BANK_CH_STATE) using readPwmReg(). | pwm.c:pwm_disable() | Test | Closed |
| LLR_PWM_PWM_DISABLE_05 | HLR_PWM_23291 | WHEN preconditions are satisfied, the pwm_disable() function SHALL write the device block members memory offset (PWM_BANK_CH_STATE) at physical offset 0x0078 (MMAP_PWM_BANK_CH_STATE) using writePwmReg(). | pwm.c:pwm_disable() | Test | Closed |
| LLR_PWM_PWM_DISABLE_06 | HLR_PWM_23291 | WHEN all operational processing completes successfully, the pwm_disable() function SHALL return DRV_SUCCESS. | pwm.c:pwm_disable() | Test | Closed |
| DriverStatus pwm_enable | ( | const PwmDevHandler | pwmDevHdl, |
| const UInt8 | pwmChannel ) |
pwm_enable.
Enable PWM channel.
| [in] | pwmDevHdl | The pwm device handler. |
| [in] | pwmChannel | The pwm channel. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device. |
| DRV_READ_FAILED | : Failed to read from the device. |
| DRV_INVALID_CHANNEL | : The channel number is invalid. |
| DRV_OP_ALREADY_PERFORMED | : The pwm channel is already enabled. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_PWM_PWM_ENABLE_01 | HLR_PWM_23291 | WHEN pwmChannel is greater than PWM_CHANNEL_MAX, the pwm_enable() function SHALL abort processing and return DRV_INVALID_CHANNEL. | pwm.c:pwm_enable() | Test | Closed |
| LLR_PWM_PWM_ENABLE_02 | HLR_PWM_23291 | WHEN a driver operation reports a failure status other than DRV_SUCCESS, the pwm_enable() function SHALL abort processing and return that driver failure status. | pwm.c:pwm_enable() | Test | Closed |
| LLR_PWM_PWM_ENABLE_03 | HLR_PWM_23291 | WHEN READ_BIT(data, pwmChannel) == TRUE, the pwm_enable() function SHALL abort processing and return DRV_OP_ALREADY_PERFORMED. | pwm.c:pwm_enable() | Test | Closed |
| LLR_PWM_PWM_ENABLE_04 | HLR_PWM_23291 | WHEN preconditions are satisfied, the pwm_enable() function SHALL read the device block members memory offset (PWM_BANK_CH_STATE) at physical offset 0x0078 (MMAP_PWM_BANK_CH_STATE) using readPwmReg(). | pwm.c:pwm_enable() | Test | Closed |
| LLR_PWM_PWM_ENABLE_05 | HLR_PWM_23291 | WHEN preconditions are satisfied, the pwm_enable() function SHALL write the device block members memory offset (PWM_BANK_CH_STATE) at physical offset 0x0078 (MMAP_PWM_BANK_CH_STATE) using writePwmReg(). | pwm.c:pwm_enable() | Test | Closed |
| LLR_PWM_PWM_ENABLE_06 | HLR_PWM_23291 | WHEN all operational processing completes successfully, the pwm_enable() function SHALL return DRV_SUCCESS. | pwm.c:pwm_enable() | Test | Closed |
| DriverStatus pwm_getCbit | ( | const PwmDevHandler | pwmDevHdl, |
| PwmCbitStatus * | cbitStatus ) |
pwm_getCbit.
PWM get CBIT status.
| [in] | pwmDevHdl | The pwm device handler. |
| [out] | cbitStatus | The pointer of CBIT status value. |
| DRV_SUCCESS | : Success. |
| DRV_READ_FAILED | : Failed to read from the device. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_PWM_PWM_GETCBIT_01 | HLR_PWM_26203 | WHEN the pointer cbitStatus is NULL (invalid), the pwm_getCbit() function SHALL abort processing and return DRV_INVALID_PARAM. | pwm.c:pwm_getCbit() | Test | Closed |
| LLR_PWM_PWM_GETCBIT_02 | HLR_PWM_26203 | WHEN a driver operation reports a failure status other than DRV_SUCCESS, the pwm_getCbit() function SHALL abort processing and return that driver failure status. | pwm.c:pwm_getCbit() | Test | Closed |
| LLR_PWM_PWM_GETCBIT_03 | HLR_PWM_26203 | WHEN querying PWM Channel Bank 1, the pwm_getCbit() function SHALL read the global CBIT execution status (MMAP_PWM_POS_CBIT_NOT_RUN) and 5.5V supply fault status (MMAP_PWM_POS_CBIT_F_5V5) from the bank status register. | pwm.c:pwm_getCbit() | Test | Closed |
| LLR_PWM_PWM_GETCBIT_04 | HLR_PWM_26203 | FOR each PWM device bank, WHEN the soft-ground clutch state is not active (TRUE), the pwm_getCbit() function SHALL clear the under-load fault status (PWM_BIT_PASS) for that bank. | pwm.c:pwm_getCbit() | Test | Closed |
| LLR_PWM_PWM_GETCBIT_05 | HLR_PWM_26203 | FOR each configured PWM device bank (0 through PWM_DEV_CH_MAX - 1), the pwm_getCbit() function SHALL calculate the register offset using MMAP_PWM_DEV_OFFSET and read the bank fault status (MMAP_PWM_BANK_STATUS_FAULT) via readPwmReg(). | pwm.c:pwm_getCbit() | Test | Closed |
| LLR_PWM_PWM_GETCBIT_06 | HLR_PWM_26203 | WHEN preconditions are satisfied, the pwm_getCbit() function SHALL invoke bitwise routine READ_BIT() to extract target channel status bit from register payload. | pwm.c:pwm_getCbit() | Test | Closed |
| LLR_PWM_PWM_GETCBIT_07 | HLR_PWM_26203 | WHEN all operational processing completes successfully, the pwm_getCbit() function SHALL return DRV_SUCCESS. | pwm.c:pwm_getCbit() | Test | Closed |
| DriverStatus pwm_getPbit | ( | const PwmDevHandler | pwmDevHdl, |
| PwmPbitStatus * | pbitStatus ) |
pwm_getPbit.
PWM get PBIT status.
| [in] | pwmDevHdl | The pwm device handler. |
| [out] | pbitStatus | The pointer of PBIT status value. |
| DRV_SUCCESS | : Success. |
| DRV_READ_FAILED | : Failed to read from the device. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_PWM_PWM_GETPBIT_01 | HLR_PWM_26200 | WHEN the pointer pbitStatus is NULL (invalid), the pwm_getPbit() function SHALL abort processing and return DRV_INVALID_PARAM. | pwm.c:pwm_getPbit() | Test | Closed |
| LLR_PWM_PWM_GETPBIT_02 | HLR_PWM_26200 | WHEN a driver operation reports a failure status other than DRV_SUCCESS, the pwm_getPbit() function SHALL abort processing and return that driver failure status. | pwm.c:pwm_getPbit() | Test | Closed |
| LLR_PWM_PWM_GETPBIT_03 | HLR_PWM_26200 | WHEN querying PWM Channel Bank 1, the pwm_getPbit() function SHALL read the global PBIT incomplete status (MMAP_PWM_POS_PBIT_INCOMPLETED) and 5.5V supply fault status (MMAP_PWM_POS_PBIT_F_5V5) from the PBIT status register. | pwm.c:pwm_getPbit() | Test | Closed |
| LLR_PWM_PWM_GETPBIT_04 | HLR_PWM_26200 | FOR each configured PWM device bank (0 through PWM_DEV_CH_MAX - 1), the pwm_getPbit() function SHALL calculate the register offset using MMAP_PWM_DEV_OFFSET and read the bank PBIT Status Register (MMAP_PWM_PBIT_STATUS) via readPwmReg(). | pwm.c:pwm_getPbit() | Test | Closed |
| LLR_PWM_PWM_GETPBIT_05 | HLR_PWM_26200 | WHEN preconditions are satisfied, the pwm_getPbit() function SHALL invoke bitwise routine READ_BIT() to extract target channel status bit from register payload. | pwm.c:pwm_getPbit() | Test | Closed |
| LLR_PWM_PWM_GETPBIT_06 | HLR_PWM_26200 | WHEN all operational processing completes successfully, the pwm_getPbit() function SHALL return DRV_SUCCESS. | pwm.c:pwm_getPbit() | Test | Closed |
| DriverStatus pwm_getTemp | ( | const PwmDevHandler | pwmDevHdl, |
| Float32 * | temp ) |
pwm_getTemp.
PWM get temperature value in degree Celsius (C).
| [in] | pwmDevHdl | The pwm device handler. |
| [out] | temp | The pointer of temperature value in degree Celsius (C). |
| DRV_SUCCESS | : Success. |
| DRV_READ_FAILED | : Failed to read from the device. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_PWM_PWM_GETTEMP_01 | HLR_PWM_30821 | WHEN the pointer temp is NULL (invalid), the pwm_getTemp() function SHALL abort processing and return DRV_INVALID_PARAM. | pwm.c:pwm_getTemp() | Test | Closed |
| LLR_PWM_PWM_GETTEMP_02 | HLR_PWM_30821 | WHEN a driver operation reports a failure status other than DRV_SUCCESS, the pwm_getTemp() function SHALL abort processing and return that driver failure status. | pwm.c:pwm_getTemp() | Test | Closed |
| LLR_PWM_PWM_GETTEMP_03 | HLR_PWM_30821 | WHEN preconditions are satisfied, the pwm_getTemp() function SHALL read the device block members memory offset (PWM_TEMP_RAW) at physical offset 0x0060 (MMAP_PWM_TEMP_RAW) using readPwmReg(). | pwm.c:pwm_getTemp() | Test | Closed |
| LLR_PWM_PWM_GETTEMP_04 | HLR_PWM_30821 | WHEN all operational processing completes successfully, the pwm_getTemp() function SHALL return DRV_SUCCESS. | pwm.c:pwm_getTemp() | Test | Closed |
| DriverStatus pwm_setFrequencyDutycycle | ( | const PwmDevHandler | pwmDevHdl, |
| const UInt16 | frequency, | ||
| const UInt16 | dutyCycle ) |
pwm_setFrequencyDutycycle.
Set the PWM frequency and duty cycle.
| [in] | pwmDevHdl | The pwm device handler. |
| [in] | frequency | The pwm frequency in Hz. |
| [in] | dutyCycle | The pwm duty cycle in percentage (0% - 100%). |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : Failed to write to the device. |
| DRV_READ_FAILED | : Failed to read from the device. |
| DRV_INVALID_VALUE | : The pwm duty cycle value is out of range. |
| DRV_VALIDATE_FAILED | : The pwm frequency or duty cycle value is not set correctly in memory map. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_01 | HLR_PWM_23289 | WHEN dutyCycle is greater than PWM_DUTY_CYCLE_MAX, the pwm_setFrequencyDutycycle() function SHALL abort processing and return DRV_INVALID_VALUE. | pwm.c:pwm_setFrequencyDutycycle() | Test | Closed |
| LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_02 | HLR_PWM_23289 | WHEN frequency is equal to 0, the pwm_setFrequencyDutycycle() function SHALL abort processing and return DRV_INVALID_VALUE. | pwm.c:pwm_setFrequencyDutycycle() | Test | Closed |
| LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_03 | HLR_PWM_23289 | WHEN a driver operation reports a failure status other than DRV_SUCCESS, the pwm_setFrequencyDutycycle() function SHALL abort processing and return that driver failure status. | pwm.c:pwm_setFrequencyDutycycle() | Test | Closed |
| LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_04 | HLR_PWM_23289 | WHEN period register readback verification fails (readback value does not match the configured period count), the pwm_setFrequencyDutycycle() function SHALL abort processing and return DRV_VALIDATE_FAILED. | pwm.c:pwm_setFrequencyDutycycle() | Test | Closed |
| LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_05 | HLR_PWM_23289 | WHEN on-time register readback verification fails (readback value does not match the configured active on-time count), the pwm_setFrequencyDutycycle() function SHALL abort processing and return DRV_VALIDATE_FAILED. | pwm.c:pwm_setFrequencyDutycycle() | Test | Closed |
| LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_06 | HLR_PWM_23289 | WHEN preconditions are satisfied, the pwm_setFrequencyDutycycle() function SHALL invoke frequency macro HZ_() to compute pulse period tick count. | pwm.c:pwm_setFrequencyDutycycle() | Test | Closed |
| LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_07 | HLR_PWM_23289 | WHEN preconditions are satisfied, the pwm_setFrequencyDutycycle() function SHALL write the device block members memory offset (PWM_PWM_PERIOD) at physical offset 0x0008 (MMAP_PWM_PWM_PERIOD) using writePwmReg(). | pwm.c:pwm_setFrequencyDutycycle() | Test | Closed |
| LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_08 | HLR_PWM_23289 | WHEN preconditions are satisfied, the pwm_setFrequencyDutycycle() function SHALL write the device block members memory offset (PWM_PWM_ON_TIME) at physical offset 0x000C (MMAP_PWM_PWM_ON_TIME) using writePwmReg(). | pwm.c:pwm_setFrequencyDutycycle() | Test | Closed |
| LLR_PWM_PWM_SETFREQUENCYDUTYCYCLE_09 | HLR_PWM_23289 | WHEN all operational processing completes successfully, the pwm_setFrequencyDutycycle() function SHALL return DRV_SUCCESS. | pwm.c:pwm_setFrequencyDutycycle() | Test | Closed |
|
static |
readPwmReg - pwm PCIe read function.
To read function for PCIe PWM.
| [in] | baseAddress | The base address of the module and device. |
| [in] | offset | The offset address from module base address. |
| [out] | data | 32bit data to read from PCIe. |
| DRV_SUCCESS | : Success. |
| DRV_READ_FAILED | : PCIe failed to read value. |
| DRV_INVALID_PARAM | : The provided address pointer is invalid. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_PWM_READPWMREG_01 | HLR_PWM_23289 | WHEN the pointer data is NULL (invalid), the readPwmReg() function SHALL abort processing and return DRV_INVALID_PARAM. | pwm.c:readPwmReg() | Test | Closed |
| LLR_PWM_READPWMREG_02 | HLR_PWM_23289 | WHEN the pointer data is valid, the readPwmReg() function SHALL read a 32-bit register value from physical memory address (baseAddress + addrOffset) into *data using PCIe primitive interDrv_Read32(). | pwm.c:readPwmReg() | Test | Closed |
| LLR_PWM_READPWMREG_03 | HLR_PWM_23289 | WHEN memory access via interDrv_Read32() fails (status not equal to INTF_SUCCESS), the readPwmReg() function SHALL abort processing and return DRV_READ_FAILED. | pwm.c:readPwmReg() | Test | Closed |
| LLR_PWM_READPWMREG_04 | HLR_PWM_23289 | WHEN all operational processing completes successfully, the readPwmReg() function SHALL return DRV_SUCCESS. | pwm.c:readPwmReg() | Test | Closed |
|
static |
writePwmReg - pwm PCIe write function.
To write function for PCIe PWM.
| [in] | baseAddress | The base address of the module and device. |
| [in] | offset | The offset address from module base address. |
| [in] | data | 32bit data to write to PCIe. |
| DRV_SUCCESS | : Success. |
| DRV_WRITE_FAILED | : PCIe failed to write value. |
| Requirement ID | Parent HLR ID | Detailed Low-Level Requirement Statement (EARS Format) | Software Unit Reference | Verification Method | Status |
|---|---|---|---|---|---|
| LLR_PWM_WRITEPWMREG_01 | HLR_PWM_23289 | WHEN invoked, the writePwmReg() function SHALL write the 32-bit word data to physical memory address (baseAddress + addrOffset) using PCIe primitive interDrv_Write32(). | pwm.c:writePwmReg() | Test | Closed |
| LLR_PWM_WRITEPWMREG_02 | HLR_PWM_23289 | WHEN memory access via interDrv_Write32() fails (status not equal to INTF_SUCCESS), the writePwmReg() function SHALL abort processing and return DRV_WRITE_FAILED. | pwm.c:writePwmReg() | Test | Closed |
| LLR_PWM_WRITEPWMREG_03 | HLR_PWM_23289 | WHEN all operational processing completes successfully, the writePwmReg() function SHALL return DRV_SUCCESS. | pwm.c:writePwmReg() | Test | Closed |